Packet Classifier Compression via Directed Graph Minimization

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Solution Overview

Problem

TCAMs used in packet classification face limitations such as limited capacity, high power consumption, heat generation, and cost, due to the need for a large number of entries to represent rules, especially when rules are not in ternary format, leading to inefficiencies in routers.

Innovation Solution

A method to construct a packet classifier by representing rules as a directed graph, formulating minimization problems, solving these using dynamic programming, and combining solutions to reduce the number of TCAM entries required, thereby instantiating a reduced packet classifier in a content-addressable memory device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If TCAM entries are increased to represent rules in prefix format, then packet classification functionality is maintained, but hardware capacity requirements increase significantly

Engineering Contradiction:

Improvepacket classification functionalityVSAvoidnumber of TCAM entries

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges multiple TCAM entries into a single compressed entry by representing packet classification rules as a directed acyclic graph (FDD), where shared prefixes and common decision paths are combined. This reduces the total number of entries needed while maintaining equivalent classification functionality through the graph structure that preserves all necessary rule relationships.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a compressed representation (copy) of the packet classifier rules in FDD format that captures the essential classification logic without requiring literal copies of each rule entry. The FDD structure serves as a compact model that can be instantiated in TCAM with far fewer entries than the original rule set would require.

Inventive Principle:

Principle #26Copying

2Adaptability or versatility

If TCAM capacity is increased to store more rules, then packet classification capability improves, but power consumption and heat generation increase

Engineering Contradiction:

Improvepacket classification capabilityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

By merging multiple individual TCAM entries into a reduced set of compressed entries through FDD representation, the patent decreases the total number of active memory cells required. This directly reduces the power consumption associated with TCAM operations while preserving the full packet classification capability through the structured graph representation.

Inventive Principle:

Principle #5Merging (Combining)

3Adaptability or versatility

If TCAM entries are expanded to represent range rules, then rule flexibility is maintained, but the number of required entries increases exponentially

Engineering Contradiction:

Improverule flexibilityVSAvoidnumber of TCAM entries

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the packet classification problem into a directed graph structure where each node represents a decision point and each edge represents a rule path. This segmentation allows range rules to be represented through the graph topology rather than requiring explicit expansion into multiple individual entries, maintaining flexibility while reducing complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent combines multiple expanded range rule entries into a single FDD structure that captures the same flexibility through shared paths and nodes. The graph structure merges common prefixes and decision logic across multiple rules, reducing the total entry count while preserving the ability to match various packet ranges.

Inventive Principle:

Principle #5Merging (Combining)

4Speed

If TCAM chips are used for packet classification, then processing speed is improved, but hardware cost increases

Engineering Contradiction:

Improvepacket processing speedVSAvoidhardware cost

Core Design Contradiction:

SpeedVSEase of manufacture

Solution Approach 1:

By reducing the number of TCAM entries needed through FDD compression, the patent decreases the total TCAM capacity required. This allows the use of smaller, less expensive TCAM chips while maintaining the high-speed processing capabilities of TCAM-based architecture, thereby reducing hardware cost without sacrificing performance.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS8654763B2Systematic approach towards minimizing packet classifiers

Publication Date: 2014.02.18 BOARD OF TRUSTEES OPERATING MICHIGAN STATE UNIV

AI summary

A method is provided for constructing a packet classifier for a computer network system. The method includes: representing a set of rules for packet classification as a directed graph; formulating a plurality of minimization problems from the directed graph, where subgraphs extending from non-terminal nodes in the directed graph represent a minimization problem (i.e., a one-dimensional packet classifier); solving the plurality of minimization problems; combining solutions for the plurality of minimization problems to yield a reduced set of rules which form a reduced packet classifier; and instantiating the reduced packet classifier in a content-addressable memory device.