Packet Classifier Parallel Vector Processing for 5G Latency

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Solution Overview

Problem

Conventional packet classification methods in high-throughput data communications networks, such as those in 5G networks, face challenges with overlapping Packet Detection Rules (PDRs) expressed in range values, leading to computational intensity and latency issues due to the need for sequential processing through multiple classifier nodes.

Innovation Solution

A method and system utilizing vector-based processing to perform rule-based classification, where packet header data is compared with feature definition data and packet detection data in parallel, using registers to efficiently identify matching rules and prioritize processing based on rule priority, thereby reducing latency and increasing throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional tree-structure classifiers are used for packet classification, then rule-based classification can be performed, but processing latency increases and throughput decreases due to sequential processing through multiple classifier nodes

Engineering Contradiction:
Improveclassification accuracyVSAvoidprocessing latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the packet classification task into distinct feature extraction stages, where each stage processes specific packet header features independently. This segmentation allows parallel processing of different feature sets (e.g., source/destination IP addresses, port numbers, protocol types) through separate classification pipelines, thereby reducing overall processing latency while maintaining classification accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from traditional sequential single-dimensional classification to multi-dimensional parallel classification by processing multiple packet header features simultaneously across different dimensions. Each dimension corresponds to a specific feature type, and parallel processing occurs across these dimensions, effectively converting a time-sequential operation into a spatially-parallel operation that reduces latency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If dedicated hardware and custom silicon are used to achieve high packet throughput, then processing speed increases, but flexibility decreases and the system cannot adapt to varied packet handling requirements

Engineering Contradiction:
Improvepacket throughputVSAvoidflexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements a universal packet classification system that can handle multiple packet types and protocols through a single configurable software-based architecture. The system uses programmable feature extraction and classification rules that can be dynamically adjusted to accommodate different packet handling requirements, eliminating the need for dedicated hardware for each protocol while maintaining high throughput through efficient parallel processing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs dynamic, software-configurable classification rules that can be modified in real-time without hardware reconfiguration. The system dynamically adapts to varying packet streams by loading appropriate feature extraction algorithms and classification rules from memory, enabling flexible response to changing network conditions and packet types while maintaining high processing speeds through optimized software execution.

Inventive Principle:
Principle #15Dynamics

3Speed

If bit-level parallelism is used to accelerate packet filtering, then processing speed increases, but storage space requirements increase quadratically with the number of rules

Engineering Contradiction:
Improvefiltering speedVSAvoidstorage space
Core Design Contradiction:
SpeedVSVolume of stationary object

Solution Approach 1:

The patent applies partial parallelism by processing only the most relevant packet header features in parallel rather than all possible features. The system identifies and processes critical features (such as source/destination addresses and port numbers) through parallel pipelines while handling less critical features sequentially, thereby achieving significant speedup without the quadratic storage overhead of full bit-level parallelism across all features.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements local parallel processing by creating separate parallel classification pipelines for different feature types rather than a single monolithic parallel processor. Each pipeline processes specific feature sets with appropriate parallelism levels, allowing the system to optimize storage usage by only maintaining parallel data structures for features that benefit most from parallel processing, thereby avoiding quadratic storage growth.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11398977B2Packet classifier
Publication Date: 2022.07.26 MICROSOFT TECHNOLOGY LICENSING LLC
  • US11398977B2 patent drawing
  • US11398977B2 patent drawing
  • US11398977B2 patent drawing

AI summary

A packet classifier and methods of processing data packets in a data communications network can include receiving a data packet comprising packet header data; performing rule-based classification of the received data packet to generate rule-based classification data; and processing the data packet in accordance with the rule-based classification data.