Parallel Variable-Length Packet Decoding With Sector Masks
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Solution Overview
Problem
Decoding data streams with variable length packets in a computing system is inefficient due to the need for serial processing to identify packet locations, leading to increased latency and reduced performance.
Innovation Solution
Implementing a parallel data processing circuit with a SIMD microarchitecture that partitions data streams into sectors and uses a bit mask to concurrently determine packet locations and counts, reducing latency through lockstep processing across multiple lanes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If serial processing is used to decode variable length packets, then packet locations can be identified, but latency increases and performance decreases
Solution Approach 1:
The data stream is divided into multiple fixed-size sectors, and the decoding process is segmented across multiple parallel lanes. Each lane processes a specific sector independently, allowing simultaneous packet location identification across the entire data stream without serial processing delays.
Solution Approach 2:
The patent transitions from single-threaded serial processing to multi-threaded parallel processing by introducing multiple execution lanes. This dimensional change in processing architecture enables concurrent packet detection across different sectors, dramatically reducing latency while maintaining accurate packet location identification.
2Measurement precision
If serial processing is used to decode variable length packets, then packet locations can be determined, but processing performance is reduced
Solution Approach 1:
The decoding task is segmented into independent units, with each execution lane handling a specific sector. This segmentation allows parallel processing that maintains accurate packet location determination while significantly improving overall processing throughput and performance.
Solution Approach 2:
Each execution lane processes its assigned sector completely independently, performing the full packet detection algorithm on each sector. This partial action approach ensures accurate packet location determination in each lane while the collective effect of multiple lanes achieves high processing performance.
3Device complexity
If packets are aligned on sector boundaries, then decoding complexity is reduced, but packet location information becomes unknown and varies
Solution Approach 1:
The data stream is segmented into fixed-size sectors with known boundaries, providing structural simplicity for decoding. Simultaneously, multiple execution lanes process these sectors to dynamically determine actual packet locations, combining structural simplicity with adaptive packet location detection.
Solution Approach 2:
The sectors are pre-aligned on known boundaries before decoding begins, establishing a fixed reference framework that simplifies the decoding process. The parallel processing lanes then use this predetermined structure to efficiently determine actual packet locations within the sectors.
Data Source
AI summary
An apparatus and method for efficiently performing data decoding in an integrated circuit. A computing system includes a processing circuit and a memory that stores multiple data streams. Each of the data streams is partitioned into multiple, same-sized sectors. The data stream stores multiple variable length packets, each aligned on a boundary of a sector. The processing circuit uses a parallel data microarchitecture to perform parallel data decoding and generate a mask specifying which sectors of the data stream store the start of a data packet and the number of data packets in the data stream. One or more vector instructions are available to the computer programmer to process data streams using parallel decoding. The mask supports parallel data processing for the next stage of data processing of the application.