Packet Delay Compensation for Stratum 2 Clock Accuracy
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Solution Overview
Problem
Current packet networks face challenges in achieving high timing accuracy due to clock frequency and phase variations, particularly when using cheaper oscillators like OCXO or TCXO, which fail to meet Stratum 2 clock quality requirements, and are exacerbated by jitter from multiplexing timing packets with other packet traffic.
Innovation Solution
An apparatus and method that process packet delay values to compensate for frequency and phase variations by determining, selecting, and validating packet delay parameters, allowing for adjustments to be made to the client clock without requiring special support from switches or routers traversed by timing packets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a cheaper oscillator like OCXO or TCXO is used at each client node, then per-node cost is reduced, but clock quality requirements (Stratum 2) cannot be met
Solution Approach 1:
A clock server acts as an intermediary between the Stratum 1 reference and client nodes. The server receives highly accurate timing from GPS or primary reference sources and distributes this timing through packet networks to client nodes using cheaper oscillators, enabling cost reduction while maintaining clock quality through centralized timing management
Solution Approach 2:
The system measures packet delay values between clock server and client nodes, uses these measurements to calculate frequency and phase variations, and applies compensation adjustments to client clocks based on this feedback, thereby maintaining Stratum 2 clock quality despite using cheaper oscillators
2Productivity
If timing packets are multiplexed with other packet traffic, then network resource utilization is improved, but timing accuracy deteriorates due to jitter
Solution Approach 1:
The system continuously measures packet delay values for timing packets traversing the network, calculates frequency and phase variations from these measurements, and applies compensation to client clocks, thereby maintaining timing accuracy despite multiplexing with other traffic
Solution Approach 2:
The patent replaces hardware-based timing protection mechanisms (such as dedicated timing networks or special switch/router support) with software-based processing of packet delay values, allowing timing packets to be multiplexed with other traffic while maintaining accuracy through computational compensation
3Device complexity
If conventional NTPv4 is used for timing distribution, then implementation simplicity is maintained, but timing accuracy is insufficient for Stratum 2 quality requirements
Solution Approach 1:
The system enhances conventional NTPv4 by incorporating measurement of packet delay values and calculation of frequency/phase variations, using this feedback to apply compensation adjustments, thereby achieving Stratum 2 accuracy while maintaining compatibility with existing NTP infrastructure
Solution Approach 2:
The patent changes the processing parameters by evaluating statistical parameters (minimum, maximum, mean, median) of packet delay values and using these to calculate frequency and phase variations, transforming conventional NTP operation to achieve higher accuracy without complete protocol replacement
Data Source
AI summary
An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.