Packet Group Processor for Network Device Memory Optimization

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Solution Overview

Problem

Network devices face challenges in efficiently processing packets due to the limitations of internal and external packet memories, where internal memories have higher access bandwidth but limited capacity, and external memories have lower access bandwidths that cannot support full bandwidths of current network devices, leading to congestion and increased processing complexity.

Innovation Solution

A network device is configured to group packets and make single transmit decisions for groups of packets, using both internal and external packet memories to optimize buffering and transmission, with a packet group processor defining groups of packets to be transmitted via the same network interface and a transmit processor handling these groups efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If external packet memory is used to increase storage capacity, then buffering capacity is improved, but access bandwidth decreases and cannot support full network device bandwidths

Engineering Contradiction:
Improvepacket buffering capacityVSAvoidmemory access bandwidth
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The system segments the packet memory into internal packet memory (high bandwidth, limited capacity) and external packet memory (large capacity, lower bandwidth). The packet group processor intelligently determines which packets to store in which memory based on group size and transmission timing, allowing the system to leverage both memory types optimally.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of packet handling by grouping multiple packets together for transmission. This packet grouping approach transforms the traditional packet-by-packet processing into batch processing, allowing the system to utilize external memory's large capacity while maintaining effective bandwidth through aggregated transfers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If packet-by-packet processing is used, then individual packet handling flexibility is improved, but processing speed requirements and complexity increase

Engineering Contradiction:
Improveindividual packet handling flexibilityVSAvoidprocessing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The packet group processor merges multiple individual packet processing operations into a single group processing operation. By combining packets into groups that share common transmission characteristics (same egress port, similar timing requirements), the system reduces the number of individual processing decisions needed while maintaining flexibility through intelligent group formation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs preliminary packet grouping before transmission processing. The packet group processor pre-organizes packets into groups based on their transmission requirements, so that when packets reach the transmit processor, they are already consolidated into efficient transmission units. This preliminary organization reduces real-time processing complexity.

Inventive Principle:
Principle #10Preliminary action

3Speed

If internal packet memory is used to achieve high access bandwidth, then memory access speed is improved, but storage capacity is limited

Engineering Contradiction:
Improvememory access bandwidthVSAvoidpacket storage capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The system segments the packet memory into internal packet memory (high bandwidth, limited capacity) and external packet memory (large capacity, lower bandwidth). The packet group processor intelligently determines which packets to store in which memory based on group size and transmission timing, allowing the system to leverage both memory types optimally.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20230013473A1Network device that utilizes packet grouping
Publication Date: 2023.01.19 MARVELL ISRAEL (M L S L) LTD
  • US20230013473A1 patent drawing
  • US20230013473A1 patent drawing
  • US20230013473A1 patent drawing

AI summary

A packet group processor of a network device defines groups of packets among packets that are being processed by the network device, each of at least some of the groups of packets defining a respective group of at least two different packets. Each group includes one or more packets to be transmitted via a respective same network interface. A transmit processor makes a single transmit decision that a particular group of at least two packets is to be transmitted via a corresponding network interface, and in response to the single transmit decision, transfers the particular group of at least two packets to the corresponding network interface for transmission.