Packet Header Rewrite Engine for Protocol Compatibility and Latency
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Solution Overview
Problem
Existing network switches face performance issues due to linear processing of packet protocol layers, leading to latency and overprovisioning of resources, especially when dealing with evolving network protocols where header fields are optional and not at fixed offsets.
Innovation Solution
A rewrite engine that represents each protocol header in a generic format, allowing for programmable modifications by detecting missing fields, expanding headers to include all possible fields, and using bit vectors to mark valid and invalid fields, enabling flexible and efficient processing regardless of protocol variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If protocol headers are processed linearly for each protocol layer, then protocol compatibility is maintained, but processing latency increases and resources are overprovisioned
Solution Approach 1:
The patent applies preliminary action by pre-defining generic protocol header formats that include all possible fields at fixed offsets. This allows the switch to expand variable-length headers to these pre-defined formats before processing, enabling parallel operations and eliminating the need for sequential linear processing of each protocol layer, thereby reducing latency while maintaining protocol compatibility
Solution Approach 2:
The patent introduces an intermediary generic protocol header format that acts as a standardized intermediate representation between the original variable-length protocol headers and the processing logic. This intermediary format with fixed offsets and all possible fields allows uniform processing across different protocol variations without requiring separate handling for each protocol layer, reducing both latency and resource requirements
2Productivity
If protocol headers are expanded to include all possible fields with fixed offsets, then processing efficiency improves, but header size and memory requirements increase
Solution Approach 1:
The patent applies local quality by maintaining the generic protocol header format with all possible fields at fixed offsets only where needed for processing efficiency, while allowing the actual transmitted headers to remain compact by only including necessary fields. The bit vector mechanism enables selective validation of specific fields rather than requiring all fields to be physically present in every header, thus improving processing efficiency without unnecessarily increasing header size
Solution Approach 2:
The patent changes the parameter representation by using bit vectors to indicate the presence or absence of optional fields rather than requiring all fields to be physically instantiated. This allows the header structure to maintain fixed offsets for processing efficiency while dynamically adjusting the actual content size based on which fields are present, effectively decoupling the processing framework from the physical header size
3Adaptability or versatility
If hardware tables store generic formats for various protocols, then flexibility in modifying packet headers improves, but device complexity increases
Solution Approach 1:
The patent applies universality by creating a single generic protocol header format that can represent multiple protocol variations through standardized field definitions and fixed offsets. This universal format serves all protocol types, eliminating the need for separate hardware tables for each protocol and reducing device complexity while maintaining flexibility. The bit vector mechanism provides the adaptability to handle different protocol variations within this unified framework
Solution Approach 2:
The patent uses parameter changes by representing protocol variations through bit vector parameters rather than requiring separate structural definitions for each protocol. The bit vectors dynamically indicate which optional fields are present, allowing the same generic format to adapt to different protocols without increasing hardware table complexity. This parameter-based approach maintains versatility while simplifying the device architecture
Data Source
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AI summary
Embodiments of the apparatus for modifying packet headers relate to a rewrite engine that represents each protocol header of packets in a generic format specific to that protocol to enable programmable modifications of packets, resulting in hardware and software flexibility in modifying packet headers. Software programs generic formats in a hardware table for various protocols. The rewrite engine is able to detect missing fields from a protocol header and is able to expand the protocol header to a maximum size such that the protocol header contains all possible fields of that protocol. Each of the fields has the same offset irrespective of which variation of the protocol the protocol header corresponds to. In a bit vector, all newly added fields are marked invalid (represented by 0), and all existing fields are marked valid (represented by 1). Software modification commands allow data to be replaced, removed and inserted.