Packet Matching via Counter Groups for Single Off-Chip Lookup
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Solution Overview
Problem
Existing packet matching algorithms based on on-chip and off-chip structures fail to adequately consider lookup efficiency and storage efficiency, leading to reduced performance in network processing devices due to issues like Hash conflicts and inefficient storage utilization.
Innovation Solution
A packet matching method that determines multiple Hash calculation results, indexes addresses in counter groups, selects a target counter, and acquires a target entry from off-chip memory, ensuring efficient lookup and storage by minimizing off-chip accesses through collision-triggered relocation and counter group management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If Hash algorithm is used for packet matching in off-chip memory, then storage efficiency is improved, but lookup efficiency deteriorates due to Hash conflicts requiring multiple off-chip accesses
Solution Approach 1:
The patent divides the Hash table into multiple counter groups, where each counter group manages a subset of Hash addresses. This segmentation allows the system to distribute Hash conflicts across multiple groups, reducing the likelihood of collisions requiring multiple accesses. Each counter group independently tracks counters for its assigned addresses, enabling parallel lookup operations and improving overall lookup efficiency while maintaining storage efficiency through the Hash algorithm.
2Reliability
If multiple off-chip accesses are used to resolve Hash conflicts, then lookup completeness is improved, but lookup time increases
Solution Approach 1:
The patent performs preliminary actions by pre-computing and storing counter values for multiple Hash addresses in the counter groups before lookup operations. During packet matching, the system retrieves pre-stored counter information and uses it to determine the target counter directly, eliminating the need for multiple sequential off-chip accesses. This preliminary preparation ensures lookup completeness while significantly reducing lookup time by avoiding repeated memory accesses.
3Productivity
If Ternary Content Accessible Memory or registers are provided to solve Hash conflicts, then lookup efficiency is improved, but storage efficiency deteriorates due to reduced capacity
Solution Approach 1:
The patent makes the counter groups universal by enabling them to serve multiple functions: they store counter values for Hash addresses, manage Hash conflicts, and facilitate lookup operations. The counter groups can be configured to handle different packet matching scenarios and can dynamically adjust their behavior based on traffic patterns. This multi-functionality allows the system to maintain high lookup efficiency without sacrificing storage capacity, as the same counter group structure serves both performance and storage management needs.
Data Source
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AI summary
Embodiments of the present disclosure provide a packet matching method and apparatus, a storage medium, and an electronic device. The method includes: determining multiple Hash calculation results corresponding to a key value of a packet; indexing addresses in multiple counter groups respectively according to the multiple Hash calculation results, so as to determine multiple counters, wherein one counter is indexed in one counter group; determining one target counter from the multiple counters; acquiring a target entry at a corresponding position of an off-chip memory according to the address of the target counter; in a case where the target entry is equal to the key value, determining that the packet matches the target entry.