Hardware-agnostic Packet Pipeline Specification
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Solution Overview
Problem
Existing network devices face challenges in designing packet-processing pipelines due to the complexity and tight coupling of these designs to specific hardware technologies, making it difficult to decouple the initial specification from the target hardware.
Innovation Solution
A method is provided that includes a library of hardware-agnostic packet-processing functions, allowing users to specify packet-processing pipelines from a functional perspective. This specification is then mapped onto the desired target hardware, enabling the derivation of a hardware-specific design for network devices such as switches, routers, and firewalls.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If packet-processing pipelines are tightly coupled to specific hardware technologies, then implementation efficiency is improved, but design complexity and difficulty of adapting to different hardware increases
Solution Approach 1:
The patent segments the packet-processing pipeline design into distinct functional stages (parsing, matching, action) that can be independently specified and mapped to hardware. This segmentation allows the specification to be hardware-agnostic while enabling efficient hardware mapping, resolving the contradiction between implementation efficiency and design complexity.
Solution Approach 2:
The patent introduces an intermediary specification language that sits between the functional requirements and the hardware implementation. This intermediary layer decouples the design specification from hardware details, allowing efficient hardware mapping without increasing design complexity.
2Speed
If packet-processing pipelines are customized for specific hardware, then performance is improved, but adaptability to different hardware platforms deteriorates
Solution Approach 1:
The patent creates a universal specification framework that can describe packet-processing pipelines in a hardware-independent manner. The same specification can be mapped to different hardware platforms (ASIC, FPGA, software), providing both high performance through hardware optimization and broad adaptability across platforms.
Solution Approach 2:
The patent enables dynamic mapping of the functional specification to different hardware architectures. The specification remains static and hardware-agnostic, while the mapping process dynamically adapts to the target hardware capabilities, maintaining both performance and adaptability.
3Manufacturing precision
If detailed hardware-specific design is performed early in the process, then implementation precision is improved, but flexibility to change specifications deteriorates
Solution Approach 1:
The patent performs preliminary action by establishing a complete functional specification before any hardware-specific design decisions are made. This upfront functional specification captures all requirements in a hardware-agnostic form, allowing changes to be made easily before the mapping phase, thus maintaining flexibility while ensuring implementation precision.
Solution Approach 2:
The patent inverts the traditional design flow by first creating a hardware-agnostic functional specification and then mapping it to hardware, rather than starting with hardware constraints. This inversion allows specification changes to be made independently of hardware considerations, maintaining flexibility while achieving precise implementation through the mapping process.
Data Source
AI summary
A method includes providing a library of hardware-agnostic packet-processing functions. A functional hardware-agnostic specification of a packet-processing pipeline is received from a user. The specification is defined in terms of one or more of the packet-processing functions drawn from the library. A hardware-specific design of the packet-processing pipeline, which is suited to given hardware, is derived from the specification.


