Programmable Packet Pipeline Virtual Switch Offload

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Solution Overview

Problem

The use of an Openflow controller for virtual switches in packet processing can lead to loss of details in P4-based rules, resulting in increased latency and inefficient use of host processor resources, particularly when handling longest prefix matches or wildcard matches.

Innovation Solution

Offloading virtual switch operations to a programmable hardware pipeline of a packet processing device, which configures operations using multiple control planes to translate OpenFlow configurations into P4-based configurations, thereby managing packet forwarding and enforcing control plane policies directly on the hardware.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If Openflow controller is used for virtual switches in packet processing, then packet forwarding control is centralized and manageable, but processing latency increases and host processor resources are inefficiently utilized

Engineering Contradiction:
Improvepacket forwarding controlVSAvoidprocessing latency
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent extracts packet processing operations from the host processor and Openflow controller to a dedicated packet processing device with hardware pipeline. This separation removes the processing burden from the host processor and enables parallel hardware acceleration, reducing latency while maintaining centralized control through the Openflow controller.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a packet processing device as an intermediary between the Openflow controller and the network interface. This intermediary handles packet processing in hardware, acting as a mediator that reduces the communication overhead and latency between the controller and host processor while maintaining the control plane hierarchy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If Openflow controller handles all packet processing decisions, then centralized control is maintained, but host processor resources are overutilized and unavailable for other tasks

Engineering Contradiction:
Improvecentralized controlVSAvoidhost processor resource utilization
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent extracts packet processing functions from the host processor to a dedicated packet processing device. This extraction allows the host processor to focus on higher-level management tasks while the hardware pipeline handles packet forwarding, freeing resources for other computational tasks.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The packet processing device provides self-service by handling packet processing autonomously in hardware without requiring host processor intervention for each packet. The device maintains its own processing pipeline and can operate independently, reducing the burden on host processor resources.

Inventive Principle:
Principle #25Self-service

3Productivity

If P4-based rules are programmed into the packet processing pipeline, then processing efficiency increases, but loss of rule details occurs when using Openflow controller

Engineering Contradiction:
Improvepacket processing efficiencyVSAvoidrule details
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent introduces a translation layer as an intermediary that converts Openflow controller configurations into P4-based pipeline configurations. This translation mechanism preserves the detailed P4 rules while maintaining compatibility with the Openflow controller's centralized control model, preventing information loss during the configuration process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transforms the configuration parameters from Openflow's software-based format to P4's hardware pipeline format through a translation process. This parameter transformation maintains the semantic meaning and detail of the rules while adapting them for efficient hardware execution in the packet processing pipeline.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20220174005A1Programming a packet processing pipeline
Publication Date: 2022.06.02 INTEL CORP
  • US20220174005A1 patent drawing
  • US20220174005A1 patent drawing
  • US20220174005A1 patent drawing

AI summary

Examples described herein relate to a packet processing device that includes a programmable packet processing pipeline that is configured using a virtual switch. In some examples, the programmable packet processing pipeline is to receive configurations from multiple control planes via the virtual switch to configure packet processing actions. In some examples, the virtual switch is to provide inter-virtual execution environment communications. In some examples, the programmable packet processing pipeline is configured using a programming language.