Packet Processing Device Gate Control for Mobile Front Haul
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Solution Overview
Problem
In mobile front haul (MFH) networks, the process of learning transmission patterns for gate control information between base station devices and radio antenna stations is resource-intensive, leading to potential delays in packet processing, especially during route switching events.
Innovation Solution
Implementing a packet processing device with a detector to analyze the transmission pattern of priority packets, generating a remote gate control signal, and transmitting it to other nodes, allowing only edge nodes to perform TAS calculation and reduce CPU resource consumption across the network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each node in the network learns the transmission pattern of priority packets to create gate control information, then the gate control can be optimized for priority packet forwarding, but a large load is caused in the learning process and potential delays occur during route switching
Solution Approach 1:
The network nodes are segmented into edge nodes and intermediate nodes based on their functional roles. Edge nodes perform the computationally intensive transmission pattern learning and gate control information creation, while intermediate nodes simply forward packets and gate control signals. This segmentation concentrates the processing load at edge nodes and eliminates redundant processing at intermediate nodes, resolving the contradiction between control accuracy and processing speed.
Solution Approach 2:
The gate control signal is extracted as a separate control mechanism from the data packets. The edge node creates gate control information based on learned transmission patterns and transmits it independently to intermediate nodes. This extraction allows the control plane to operate independently from the data plane, enabling optimized gate control without burdening the data forwarding path with learning computations.
2Adaptability or versatility
If each node recreates gate control information for route switching, then the gate control can adapt to new routes, but MFH packets could be delayed during the recreation process
Solution Approach 1:
The edge node performs preliminary learning of transmission patterns during normal operation and pre-creates gate control information. When route switching is needed, the edge node can quickly generate updated gate control signals based on pre-established patterns, rather than requiring intermediate nodes to perform time-consuming pattern learning and recreation during the switching event. This preliminary action at the edge node enables rapid adaptation to route changes.
3Reliability
If a TAS is implemented in each node to perform gate control, then priority packet forwarding can be controlled at each node, but the CPU resource consumption increases across the network
Solution Approach 1:
The TAS functionality is segmented and centralized at edge nodes rather than being distributed to all intermediate nodes. Edge nodes perform the computationally intensive transmission pattern learning and gate control information creation, while intermediate nodes simply forward packets and gate control signals based on received instructions. This segmentation eliminates redundant CPU processing at intermediate nodes while maintaining reliable priority packet forwarding control through the centralized edge node management.
Data Source
AI summary
A packet processing device is implemented in a network that transmits priority packets and non-priority packets having a lower priority than the priority packets. The packet processing device includes: a packet storage, a gate, a controller, a detector, a generator, and a transmitter. The packet storage stores non-priority packets. The gate is provided on an output side of the packet storage. The controller controls the gate. The detector detects a transmission pattern of the priority packets. The generator generates, based on the transmission pattern of the priority packets, a gate control signal for controlling a gate of a packet processing device implemented in another node. The transmitter transmits the gate control signal to a destination of the priority packets.