Packet Processing Identifier Mapping for Update Overhead Reduction

The patent introduces an intermediary mapping table that stores the correspondence between instruction block identifiers and their storage locations. Instead of directly storing multiple identical identifiers for different packets, the system uses this mapping table as an intermediate layer. When the storage location of an instruction block changes, the update is performed in the mapping table, and all packets referencing this instruction block automatically benefit from the updated location through the intermediary, thereby reducing update overhead while maintaining processing correctness.

The patent creates a copy of the instruction block mapping information in the form of a mapping table that can be efficiently updated. Rather than updating all original identifier references when a storage location changes, the system maintains a copied representation in the mapping table that serves as the single source of truth for location information, reducing the complexity and overhead of updates.

The mapping table serves as an intermediary structure that centralizes the storage location information. Instead of having to update multiple scattered identifier references across different packet processing contexts, the system performs updates in a single location within the mapping table. This intermediary structure simplifies the update process while ensuring all identifier references remain valid through the centralized mapping.

The mapping table performs multiple functions: it stores the correspondence between identifiers and storage locations, serves as the single update point for location changes, and provides a unified interface for all packets to access instruction block locations. This multi-functional design reduces overall system complexity while maintaining identifier validity.