Packet Processing Unit Power Mode Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional network-connected information-processing apparatuses face challenges in reducing power consumption effectively due to the need for continuous CPU intervention in packet processing, leading to high development costs and increased complexity when trying to switch between power modes.
Innovation Solution
An information-processing apparatus with a packet processing unit that determines whether packet processing is needed and available, allowing the power mode to be switched accordingly, enabling the apparatus to process packets without CPU intervention in power saving mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the CPU is switched to sleep mode to reduce power consumption, then power consumption is reduced, but the CPU must be switched back to normal mode every time a packet is received, preventing long-duration low power states
Solution Approach 1:
The packet processing function is segmented from the CPU and assigned to a dedicated packet processing unit. This allows the CPU to be separated into sleep mode while the packet processing unit independently handles packet reception and processing, enabling long-duration low power states without frequent CPU wake-ups
Solution Approach 2:
A packet processing unit is introduced as an intermediary between the network interface and the CPU. This intermediary unit can process packets autonomously without requiring CPU intervention, allowing the CPU to remain in sleep mode for extended periods while still maintaining network functionality
2Extent of automation
If a dedicated network controller with PCI bus function is provided to process packets externally, then packet processing can occur without CPU intervention, but functions irrelevant to network communications are added and cost increases
Solution Approach 1:
The packet processing unit is designed with multi-functionality, handling both packet processing tasks and serving as a bridge between the network interface and CPU. This universal unit eliminates the need for separate dedicated network controllers with unnecessary PCI bus functions, reducing overall system complexity while maintaining automation capabilities
3Use of energy by moving object
If the CPU, MAC, and packet processing unit are integrated into an ASIC to enable autonomous packet processing, then power consumption is reduced, but development cost increases significantly
Solution Approach 1:
Instead of integrating all functions into a single expensive ASIC, the system segments functionality into a standard CPU and a separate packet processing unit. This segmentation allows for more flexible implementation options and reduces development costs while still achieving autonomous packet processing and power savings
Solution Approach 2:
The patent uses a standardized packet processing unit design that can be replicated and adapted across different systems rather than requiring custom ASIC development. This copying approach reduces development costs while maintaining the core functionality of autonomous packet processing
Data Source
AI summary
A processor includes a communication control unit for communicating with an external network device via a connecting unit. A power control unit switches a power mode between a normal power mode and a power saving mode. A packet processing unit includes a first determining unit that determines whether a packet processing is needed for a packet received when the power saving mode is set and a second determining unit that determines, when it is determined that the packet processing is needed, whether the packet processing is available. The power control unit switches the power mode based on a result of determination by the second determining unit.