Packet Processing Validation via High-Level to Low-Level Translation
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Solution Overview
Problem
The challenge in validating circuit designs for communication protocols lies in the time-consuming process of preparing suitable test packets and correlating binary packet data with high-level representations, which often results in inadequate test coverage and increased risk of undetected design errors.
Innovation Solution
A method and system that utilize a high-level language specification to generate and simulate packets, translating between high-level and low-level representations to compare output packets against expected results, ensuring comprehensive validation across different abstraction levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If binary representation of packets is used for low-level testing, then testing can be performed at the implementation level, but it becomes challenging to correlate binary packet data with high-level representation and increases time consumption
Solution Approach 1:
The patent introduces an intermediary translation layer that converts between high-level packet representations and binary low-level representations. This intermediary automatically correlates the two formats, eliminating the manual correlation effort and time consumption while maintaining testing accuracy at both levels.
Solution Approach 2:
The testing system is designed to handle multiple representation levels (high-level and low-level) through a unified testing framework. The same testbench can operate at different abstraction levels by automatically translating packets, making the testing process versatile and reducing redundant work.
2Reliability
If comprehensive test packets are prepared to ensure adequate test coverage, then design errors can be detected, but the process of generating and executing tests becomes time consuming
Solution Approach 1:
The system performs preliminary actions by automatically generating comprehensive test packets from high-level specifications before actual testing begins. The translation framework pre-processes test data into multiple representations, so that during execution, comprehensive coverage is achieved without time-consuming manual preparation.
Solution Approach 2:
The patent creates multiple copies of test packets in different representations (high-level and low-level) from a single source specification. This copying approach ensures comprehensive test coverage across different abstraction levels while reducing the time needed to manually create separate test sets for each level.
3Ease of operation
If manual preparation of test packets is performed, then control over test cases can be maintained, but test coverage is compromised and parts of the system remain untested
Solution Approach 1:
The testing system provides self-service by automatically generating comprehensive test packets from high-level specifications without requiring manual intervention. The system serves itself by translating and preparing test data, maintaining tester control through the specification layer while achieving comprehensive coverage that manual preparation cannot achieve.
Data Source
AI summary
Approaches for validating a design for a packet processing circuit. A method inputs a high-level language specification of a first format of an input packet. From the input specification, a plurality of high-level input packets having the first format are generated, with each field of each input packet having a value consistent with the packet specification. The packet processing circuit is simulated using a first model with input of the high-level input packets, and a first plurality of high-level output packets are output. The high-level input packets are translated into low-level input packets. The packet processing circuit is simulated using a second model with input of the low-level input packets, and a plurality of low-level output packets are output and translated into a second plurality of high-level output packets. The first and second pluralities of high-level output packets are compared to corresponding expected output packets, and comparison results stored.