Packet Processor Power Control via Intermittent Supply
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Solution Overview
Problem
Packet processing devices experience significant stand-by power consumption due to constant power supply to processors during low traffic periods, limiting the reduction of average power consumption despite efforts in miniaturization and integration of electronic components.
Innovation Solution
Incorporating processor packet detectors and a power supply switch unit to intermittently turn on and off power supply to packet processors based on detection results, ensuring power is only provided when packets are present, thereby reducing unnecessary power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If constant power supply is provided to packet processors to maintain data communicable state, then reliability is improved, but power consumption increases
Solution Approach 1:
The power supply system dynamically adjusts between active and standby states based on traffic conditions. Packet detectors continuously monitor for incoming packets and trigger power supply activation only when packets are detected, transforming the static power supply into a dynamic system that adapts to actual processing needs.
Solution Approach 2:
The system uses its own packet detection capability to automatically control power supply timing. The packet detectors embedded in the system serve both their primary function of identifying packets and the secondary function of triggering power supply activation, eliminating the need for external control mechanisms.
2Device complexity
If miniaturization and integration of electronic components are pursued to reduce operating voltage, then device complexity is reduced, but power consumption reduction becomes insufficient
Solution Approach 1:
Instead of relying solely on continuous voltage reduction through miniaturization, the system implements periodic power supply activation. Power is supplied in discrete periods only when packets are detected and need processing, rather than continuously, thereby reducing average power consumption despite component miniaturization limitations.
Solution Approach 2:
The system changes the temporal parameter of power supply (from continuous to intermittent) rather than solely relying on voltage parameter reduction through miniaturization. This parameter change approach addresses the diminishing returns of continued component scaling by introducing a new dimension of power control.
3Use of energy by stationary object
If asynchronous circuit architecture is employed to reduce stationary operating power, then power consumption is reduced, but device complexity increases due to special development tools required
Solution Approach 1:
The system segments the packet processing function from the power supply control function. Packet detectors are integrated into the packet processing path to monitor for packets, while a separate power supply unit responds to detection signals. This segmentation allows using conventional synchronous circuitry for packet processing while adding simple detection and control logic for power management.
Solution Approach 2:
A power supply control unit acts as an intermediary between packet detectors and the power supply unit. This intermediary receives detection signals, determines appropriate power supply timing, and controls power delivery, thereby simplifying the overall system architecture compared to implementing complex asynchronous circuitry throughout the entire packet processing system.
Data Source
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AI summary
In a packet processing device capable of reducing power consumption when time interval, between input packets is increased and an input traffic capacity is reduced, packet processors, N in number (N is an integer of one or more), sequentially perform processing in response to an input packet to output a processed packet and processor packet detectors detect whether or not a packet exists in the packet processors. Responsive to a result of the processor packet detectors, a power supply switch unit controls power supply to the packet processors. Thus, each of the packet processors is intermittently put into an active state by intermittent power supply.