Information Processing Apparatus Packet Reception Sequence Control

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Solution Overview

Problem

In communication systems where data is divided into multiple packets and transmitted via multiple paths, the order of packet arrival is not guaranteed, leading to difficulties in determining when all data packets have been received, which can result in incomplete data processing and system malfunctions.

Innovation Solution

An information processing apparatus and system that includes a receiver and processor configured to store division data only when all packets have been received, using packet headers with 'number-of-pieces-of-division-data' and 'final data' information to ensure that final division data is not stored until all other data packets are accounted for, regardless of the order of arrival.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is divided into multiple packets and transmitted via multiple paths, then transmission speed and efficiency are improved, but the order of packet arrival is not guaranteed, leading to difficulty in determining complete reception

Engineering Contradiction:
Improvetransmission efficiencyVSAvoiddata reception completeness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The transmitter preliminarily assigns sequence numbers to each division data before transmission and includes these sequence numbers in the packet headers. This preliminary numbering enables the receiver to track and verify complete reception of all packets regardless of arrival order, resolving the contradiction between efficient parallel transmission and reliable complete reception verification.

Inventive Principle:
Principle #10Preliminary action

2Speed

If the receiver stores data as soon as it is received, then processing speed is improved, but incomplete data may be stored if packets arrive out of order

Engineering Contradiction:
Improveprocessing speedVSAvoiddata integrity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The receiver implements a feedback mechanism using sequence numbers to monitor which packets have been received and which are still pending. The storage operation is conditioned on verifying that all expected packets (based on sequence number continuity) have been received. This feedback control ensures data integrity while enabling rapid processing once completeness is confirmed, resolving the contradiction between processing speed and data integrity.

Inventive Principle:
Principle #23Feedback

3Manufacturing precision

If the receiver waits for all packets before storing any data, then data integrity is ensured, but processing time increases

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The receiver performs preliminary buffering of incoming packets in memory without immediate storage to the final destination, while simultaneously verifying sequence number continuity. Once completeness is confirmed through the sequence numbers, all buffered data is stored atomically. This preliminary buffering approach ensures data integrity while minimizing processing time, as the actual storage operation occurs immediately after verification rather than waiting for all packets.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The receiver maintains continuous useful action by buffering incoming packets immediately upon receipt and continuously monitoring sequence number completeness. Rather than idle waiting for all packets, the system continuously processes received data in the buffer and prepares for immediate storage once the completeness condition is met, eliminating wasted time while maintaining integrity.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10609188B2Information processing apparatus, information processing system and method of controlling information processing system
Publication Date: 2020.03.31 FUJITSU LTD
  • US10609188B2 patent drawing
  • US10609188B2 patent drawing
  • US10609188B2 patent drawing

AI summary

An information processing apparatus includes a receiver to receive data-packets, the data-packets generated by dividing a message into division-data and storing, for each of the division-data, one of the plurality of division data into one of the plurality of data packets, wherein each of the data-packets also includes a data value indicating a quantity of the division-data and data indicating whether or not the data-packet includes final division data corresponding to an end of the message, a memory, and a processor to store the division-data that is contained in a packet of the data-packets that are received, in the memory, and suppress the final division-data from being stored in the memory until the quantity of the data-packets received by the receiver equates to the data value indicating the quantity of the division-data, in a case where the final division-data is received earlier than any one of the other division-data.