Packet Scheduling Algorithm for CPU Utilization and Jitter Control

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Solution Overview

Problem

Existing real-time scheduling algorithms for packet processing are sub-optimal and inefficient, particularly for IP-to-IP processing, as they assume zero task switching overhead and are not suitable for handling jitter from dirty input streams, leading to propagation of jitter across clean streams.

Innovation Solution

A non-preemptive scheduling algorithm that monitors time delays and sorts packets based on increasing order of time delay, processing one packet per time period for each channel, ensuring maximum CPU utilization and minimizing delay and jitter, while preventing jitter propagation across streams.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If existing scheduling algorithms are used for packet processing, then packet transmission can be performed, but CPU utilization is sub-optimal and task switching overhead is ignored leading to inefficiency

Engineering Contradiction:
ImproveCPU utilizationVSAvoidtask switching overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements a dynamic scheduling algorithm that adapts to varying packet characteristics and channel conditions. The scheduler dynamically adjusts packet transmission timing based on monitored time delays and channel status, optimizing CPU utilization while accounting for actual task switching overhead rather than assuming zero overhead as in static algorithms

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent incorporates feedback mechanisms where the scheduler monitors time delays associated with each packet and uses this information to make informed scheduling decisions. This feedback loop allows the system to optimize CPU utilization by adjusting scheduling parameters based on actual performance metrics rather than relying on theoretical assumptions

Inventive Principle:
Principle #23Feedback

2Ease of operation

If task switching is assumed to have zero overhead, then scheduling simplicity is maintained, but scheduling accuracy deteriorates leading to sub-optimal performance

Engineering Contradiction:
Improvescheduling simplicityVSAvoidscheduling accuracy
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent changes the fundamental parameter assumption from zero task switching overhead to a realistic non-zero overhead model. The scheduling algorithm incorporates task switching overhead as a measurable parameter, improving scheduling accuracy while maintaining operational simplicity through automated compensation mechanisms that hide the complexity from users

Inventive Principle:
Principle #35Parameter changes

3Productivity

If existing schedulers are used for IP-to-IP processing, then packet routing is performed, but jitter from dirty input streams propagates to clean streams

Engineering Contradiction:
Improvepacket processing throughputVSAvoidjitter propagation
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the network processing into isolated channels where each channel processes packets independently. This segmentation prevents jitter from dirty input streams in one channel from propagating to clean streams in other channels, while maintaining high throughput through parallel processing of multiple channels

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary scheduling layer that sits between input streams and output streams. This intermediary scheduler monitors and controls packet transmission timing, acting as a buffer that prevents jitter propagation while maintaining processing throughput through intelligent packet release timing

Inventive Principle:
Principle #24Intermediary (Mediator)

4Productivity

If multiple channels are processed simultaneously, then overall system throughput increases, but resource allocation complexity increases

Engineering Contradiction:
Improvesystem throughputVSAvoidresource allocation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies local quality by dedicating specific CPU resources to specific channels based on their individual needs and characteristics. Each channel receives customized resource allocation rather than uniform treatment, optimizing overall system throughput while managing complexity through localized resource management strategies

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10530519B2System and method for packet scheduling
Publication Date: 2020.01.07 MICROSOFT TECHNOLOGY LICENSING LLC
  • US10530519B2 patent drawing
  • US10530519B2 patent drawing
  • US10530519B2 patent drawing

AI summary

The present disclosure is directed towards a method for scheduling data packets in a multi-channel packet processing environment. The method may include receiving one or more data packets associated with an incoming signal and inserting the one or more data packets into a queue. The method may further include monitoring a time delay associated with each of the one or more data packets, wherein the time delay indicates a difference between packet arrival and packet departure times. The method may also include sorting the time delay results based upon an increasing order of time delay and determining a total number of data packets associated with each of a plurality of channels. The method may also include scheduling a data packet for processing based upon, at least in part, at least one of the sorted time delay results and the total number of data packets associated with each channel.