Selective Packet Splitting for Cache-Efficient Network I/O

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Solution Overview

Problem

Current methods for input/output transfer in network devices are inefficient, particularly due to limited cache resources and the need for all data to be sent through either direct cache access or main memory, leading to bottlenecks and suboptimal processing.

Innovation Solution

A method for selectively transferring packets or portions of packets to a processing unit based on packet attributes, allowing direct access for some packets while storing others in main memory, with dynamic adjustment of cache and bandwidth to optimize resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If all packets are sent through direct cache access to the processing unit, then processing speed is improved, but cache resources are depleted and bandwidth requirements increase

Engineering Contradiction:
Improvepacket processing speedVSAvoidcache resource consumption
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent segments packets into different categories based on attributes (e.g., urgent/non-urgent, size, type). High-priority packets receive direct cache access for fast processing, while low-priority packets are stored in main memory. This segmentation resolves the contradiction by allocating cache resources only to packets that require fast processing, rather than all packets uniformly.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different quality levels of access to different packets based on their attributes. Critical packets get high-quality direct cache access, while non-critical packets get lower-quality main memory access. This local differentiation optimizes cache utilization by providing fast access only where needed, resolving the contradiction between speed and resource consumption.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If all packets are stored in main memory before processing, then cache resources are preserved, but processing efficiency decreases due to expensive memory access

Engineering Contradiction:
Improvecache resource preservationVSAvoidpacket processing efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent segments the packet population into high-priority and low-priority groups. High-priority packets are selectively sent to cache for fast access, maintaining processing efficiency for critical traffic, while low-priority packets use main memory, preserving cache resources. This selective segmentation resolves the contradiction between cache preservation and processing efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of applying direct cache access to all packets (excessive action), the patent applies it only to the necessary subset of high-priority packets (partial action). This partial application of direct cache access maintains sufficient processing efficiency for critical traffic while avoiding the excessive consumption of cache resources that would occur with universal direct access.

Inventive Principle:
Principle #16Partial or excessive action

3Loss of time

If direct cache access is used for all packets, then processing time is reduced, but bandwidth requirements and storage needs increase

Engineering Contradiction:
Improvepacket processing timeVSAvoidbandwidth and storage requirements
Core Design Contradiction:
Loss of timeVSQuantity of substance

Solution Approach 1:

The patent segments packets into categories based on processing time requirements and attributes. Time-sensitive packets are routed through direct cache access to minimize processing time, while non-time-sensitive packets use main memory, reducing overall bandwidth and storage requirements. This segmentation resolves the contradiction by allocating fast access only to packets that truly need it.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the access parameter (cache vs. main memory) based on packet attributes such as priority, size, and type. By dynamically adjusting the access parameter according to packet characteristics, the system minimizes processing time for critical packets while reducing overall bandwidth and storage requirements through selective access patterns.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4248326B1Method and system for efficient input/output transfer in network devices
Publication Date: 2026.01.07 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • EP4248326B1 patent drawingFigure 1A
  • EP4248326B1 patent drawingFigure 1B
  • EP4248326B1 patent drawingFigure 1C

AI summary

Methods and systems for selective access to a processing unit are described. An electronic device that is coupled with the processing unit for processing packets is described. The electronic device is operative to receive a packet; determine based on one or more attributes of the packet that the packet is to be split; and responsive to determining that the packet is to be split, splitting the packet into a first portion and a second portion, where the first portion is to be processed by the processing unit and the second portion is to be stored without being processed by the processing unit; sending the first portion of the packet toward the processing unit for processing; and storing the second portion of the packet.