Packet Switch Flow Control Circuit Reduces Congestion
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Solution Overview
Problem
In contemporary computing systems with PCIe interconnects, congestion occurs in packet switches due to the imbalance between downstream and upstream bandwidths, leading to delayed completion packets and underutilization of bandwidth, particularly when a stream of non-posted packets is transmitted.
Innovation Solution
A packet switch with a flow control circuit that selectively routes completion packets based on destination identifiers and prevents non-posted packets from being sent to the upstream egress port when the downstream egress port is congested, thereby reducing congestion and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the root complex transmits completion packets at a high downstream data rate, then the downstream bandwidth is utilized efficiently, but congestion occurs in the downstream egress queue and upstream ingress queue of the fanout switch
Solution Approach 1:
The flow control circuit prevents the downstream ingress port from providing non-posted packets to the upstream egress port when the downstream egress port is congested, before the congestion can propagate to the upstream ingress queue. This preliminary action stops the chain reaction that would otherwise cause completion packet delays.
Solution Approach 2:
The flow control circuit monitors the congestion state of the downstream egress port and provides feedback control signals to the downstream ingress port. When congestion is detected, the flow control circuit adjusts the packet flow rate to maintain stable operation and prevent queue overflow.
2Quantity of substance
If the downstream egress queue fills to capacity, then all downstream bandwidth capacity is occupied, but the upstream ingress queue also fills causing completion packet delays
Solution Approach 1:
The flow control circuit applies preliminary anti-action by preventing non-posted packets from entering the upstream egress port when downstream congestion is detected. This counteracts the potential harmful effect of congestion propagation before it occurs, maintaining completion packet transmission timing.
3Productivity
If multiple endpoints compete for access to the upstream egress queue, then network utilization increases, but congestion occurs causing further packet delays
Solution Approach 1:
The flow control circuit acts as an intermediary between the downstream ingress port and the upstream egress port, mediating the packet flow based on downstream egress port congestion status. This intermediary control prevents excessive packet injection into the upstream egress queue, maintaining stable multi-endpoint operation without congestion-induced delays.
Data Source
AI summary
A packet switch includes a flow control circuit for preventing a downstream ingress port of the packet switch from providing a non-posted packet to an upstream egress port of the packet switch when a downstream egress port of the packet switch is congested. As a result, congestion is reduced in the downstream egress port. Additionally, congestion is reduced in an upstream ingress port of the packet switch that receives completion packets in response to non-posted packets output from the upstream egress port and provides the completion packets to the downstream egress port. Because congestion is reduced in the upstream ingress port, latency is reduced for a completion packet received at the upstream ingress port and provided to another downstream egress port of the packet switch in response to a non-posted packet provided from another downstream ingress port to the upstream egress port and output from the packet switch.