Packet Transmission Time Estimation With Retransmission-Aware Rate Selection

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Solution Overview

Problem

In wireless communication systems, transmitters fail to accurately compute packet transmission time to select the best data rate for achieving high throughput or low latency, as they do not consider packet retransmissions in their predictions.

Innovation Solution

A computing device and method that calculate packet transmission time by storing and using arbitration interframe space, backoff, preamble, short interframe space, and acknowledgement times, along with payload time, to account for estimated packet error rates and retransmissions, allowing for the selection of optimal data rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the transmitter predicts throughput based on data rates and estimated packet error rate without considering packet retransmission, then the computation is simple, but the throughput selection accuracy is poor

Engineering Contradiction:
Improvethroughput selection accuracyVSAvoidcomputation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent pre-calculates and stores multiple parameters including AIFS time, backoff time values, preamble time, SIFS time, and ACK time in a storage circuit before the throughput computation begins. This preliminary preparation of temporal parameters allows the main computation to focus only on combining these pre-stored values with packet length and data rate, significantly reducing real-time computational complexity while maintaining accurate throughput prediction that includes packet retransmission effects.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If the transmitter does not consider packet retransmission when predicting throughput, then the computation is fast, but the latency is not optimized

Engineering Contradiction:
Improvepacket transmission timeVSAvoidthroughput
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent incorporates feedback mechanisms by using estimated packet error rates and expected backoff time values (which are derived from historical transmission statistics) to predict future transmission characteristics. The computation uses these feedback-based estimates to calculate total packet transmission time that includes retransmission effects, enabling the system to optimize both throughput and latency by selecting data rates that account for actual transmission performance feedback.

Inventive Principle:
Principle #23Feedback

3Loss of time

If the transmitter selects data rate based on simple throughput prediction, then the decision is quick, but the latency performance is poor

Engineering Contradiction:
ImprovelatencyVSAvoidcomputation complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent pre-stores multiple backoff time expected values (e.g., 0, 32, 64, 96, 128 microseconds) in the storage circuit corresponding to different transmission scenarios. During data rate selection, the system only needs to retrieve the appropriate pre-stored backoff time value based on the estimated packet error rate and combine it with other pre-calculated temporal parameters, rather than performing complex real-time simulations. This preliminary preparation enables quick latency-optimized data rate selection.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12261705B2Computing device and computing method for computing packet transmission time
Publication Date: 2025.03.25 REALTEK SEMICON CORP
  • US12261705B2 patent drawing
  • US12261705B2 patent drawing
  • US12261705B2 patent drawing

AI summary

A computing device includes: a storage circuit, for storing an arbitration interframe space (AIFS) time, at least one expected value of at least one backoff time, a preamble time, a short interframe space (SIFS) time and an acknowledgement (ACK) time; a first computing circuit, for computing a payload time according to a packet length and a packet rate; a second computing circuit, coupled to the storage circuit and the first computing circuit, for computing at least one packet transmission time according to the AIFS time, the at least one expected value of the at least one backoff time, the preamble time, the SIFS time, the ACK time and the payload time; and a third computing circuit, coupled to the second computing circuit, for computing a total packet transmission time according to the at least one packet transmission time and an estimated packet error rate.