Packet Transmission Cycle Mapping for Deterministic Network Delay
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In deterministic networks, the mismatch in cycle lengths between upstream and downstream devices can lead to infinite delay and continuous congestion due to clock errors, especially when the upstream device has a shorter cycle length than the downstream device.
Innovation Solution
A packet transmission method where a second device receives packets from a first device and determines a new cycle label based on a condition met by the packet number, allowing it to send the packets in a different cycle that aligns with the downstream device's cycle, thus avoiding congestion and delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the upstream device uses a shorter cycle length than the downstream device, then the upstream device can send packets more frequently, but the delay increases infinitely with cumulative time drift causing continuous congestion
Solution Approach 1:
The patent applies dynamics by making the cycle mapping relationship adjustable rather than fixed. The second device dynamically selects between a first cycle mapping relationship (for normal operation) and a second cycle mapping relationship (for drift correction). This allows the system to adapt to cumulative time drift while maintaining the shorter upstream cycle length for high productivity.
Solution Approach 2:
The patent changes the parameter of cycle mapping relationship based on detected time drift. When time drift exceeds a threshold, the system switches from the first cycle mapping relationship to the second cycle mapping relationship, which has a different mapping ratio. This parameter change corrects the cumulative delay while preserving the upstream device's high sending frequency.
2Reliability
If the cycle lengths of upstream and downstream devices are matched, then delay and jitter meet preset upper bounds, but the system cannot adapt to different cycle length requirements in some applications
Solution Approach 1:
The patent implements universality by designing a cycle mapping mechanism that can handle multiple cycle length scenarios. The second device maintains both a first cycle mapping relationship (for matched cycles) and a second cycle mapping relationship (for mismatched cycles), allowing the same system to serve both deterministic networks with matched cycles and applications requiring different cycle lengths.
Solution Approach 2:
The system dynamically selects between different cycle mapping relationships based on the actual cycle length mismatch detected between upstream and downstream devices. This dynamic adaptation allows the system to maintain reliable delay and jitter control while being versatile enough to handle various cycle length configurations.
3Loss of time
If time synchronization is used to maintain cycle mapping, then delay control is achieved, but the system becomes dependent on time synchronization infrastructure
Solution Approach 1:
The patent applies self-service by enabling the second device to autonomously detect cumulative time drift and switch between cycle mapping relationships without external time synchronization infrastructure. The device monitors its own packet forwarding timing and independently corrects drift by switching to the appropriate cycle mapping relationship, eliminating dependency on external synchronization systems.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
This application provides a packet transmission method and apparatus, and a system. The method includes: After receiving a first packet, a first device determines, based on a condition met by a first number carried in the first packet, a manner of sending the first packet. When the first number of the first packet meets a first condition, a second device determines a second cycle label corresponding to a first cycle label, and sends the first packet to a third device in a cycle corresponding to the second cycle label. When the first number of the first packet meets a second condition, the second device determines a third cycle label corresponding to the first cycle label, and sends the first packet to the third device in a cycle corresponding to the third cycle label.