Inter-Processor Communication Channel With Packet Voting and De-Duplication
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Fault-tolerant failsafe computer systems in safety-critical applications, such as railway systems, face challenges in validating instructions to prevent erroneous actions due to faulty components, which can lead to safety hazards.
Innovation Solution
A fault-tolerant failsafe computer system with an inter-processor communication channel that encodes and decodes data packets, uses voting logic to verify packet validity, and generates safety indications to prevent faulty instructions from being executed, ensuring safe operation by maintaining a predetermined safe state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data packets are transmitted without encoding and validation, then communication speed is fast, but system reliability deteriorates due to erroneous instructions from faulty components
Solution Approach 1:
The system performs encoding of data packets into multiple copies before transmission. This preliminary action ensures that even if some copies are corrupted during transmission, the original information can be recovered, thus improving reliability without requiring complex error correction algorithms during reception.
Solution Approach 2:
The patent implements a communication channel that creates multiple copies of encoded data packets and transmits them simultaneously. The receiver collects these copies and uses voting logic to determine the correct data, eliminating the need for complex real-time error detection and correction mechanisms while maintaining high reliability.
2Reliability
If multiple encoded copies of data packets are transmitted, then fault tolerance is improved, but communication latency increases due to the need to collect and process multiple copies
Solution Approach 1:
The system transmits more copies of data packets than strictly necessary for basic redundancy (excessive action), but uses simple voting logic to quickly determine the correct data. This approach prioritizes speed over minimal redundancy, reducing latency while maintaining fault tolerance.
Solution Approach 2:
The patent replaces complex error detection and correction algorithms (mechanical processing) with a simpler voting-based system. Each received copy is independently evaluated through voting logic, allowing parallel processing and reducing the time required for error handling, thus decreasing communication latency.
3Measurement precision
If voting logic is implemented to verify packet integrity, then measurement precision of data validity is improved, but device complexity increases
Solution Approach 1:
The system creates multiple identical copies of the data packet with embedded identification markers. Instead of implementing complex validation algorithms, the receiver simply compares these copies using voting logic - a straightforward process that achieves high measurement precision in data validity verification without significant complexity increase.
Data Source
AI summary
A fault-tolerant failsafe computer system including an inter-processor communication channel includes a transmission control module that encodes a first data packet and communicates a first encoded copy of the first data packet and a second encoded copy of the first data packet. The system also includes a receiver control module that i) receives a first encoded copy of a second data packet and a second encoded copy of the second data packet and ii) decodes the first encoded copy and the second encoded copy. The system further includes a de-duplication module that receives a plurality of data packets and communicates at least one unique data packet of the plurality of data packets.