Pad Array Structure for Optical Module Wiring
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Solution Overview
Problem
The complexity of patterning structures in optical modules, particularly with high-speed signal and ground patterns in proximity, leads to the necessity for multilayered wiring, which increases wiring resistance and complicates the design, especially in dense, multichannel optical modules using silicon-photonics techniques.
Innovation Solution
A pad array structure on a substrate where ground pads are arranged in a first column with equal distances, and signal pads in a second column positioned inwardly and parallel, with signal pads extending through spaces between ground pads, forming differential pairs, allowing for single-layer wiring and reducing wiring resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If ground pads and signal pads are arranged in proximity to each other in a conventional pattern, then the degree of freedom of patterning structure is reduced and the structure becomes complicated, but signal transmission efficiency can be maintained
Solution Approach 1:
The patent transitions from a conventional two-dimensional planar arrangement of pads to a three-dimensional stacked configuration where signal pads and ground pads are vertically aligned on different layers. This dimensional change allows signal and ground paths to coexist without lateral interference, maintaining signal integrity while simplifying the lateral patterning structure and reducing the number of lateral interconnections required.
Solution Approach 2:
The patent divides the pad structure into separate vertical segments: signal pads on one layer and ground pads on another layer, rather than arranging them side-by-side in a single plane. This segmentation allows independent optimization of signal and ground patterns without the constraints of lateral proximity, reducing patterning complexity while maintaining electrical performance.
2Reliability
If a multilayered wiring structure is adopted to handle high-speed signals and ground patterns, then the structure becomes complicated and wiring resistance increases, but signal and ground can be properly separated
Solution Approach 1:
The patent utilizes the vertical dimension by stacking signal pads and ground pads on different layers of the substrate, creating natural electrical separation without requiring complex lateral wiring structures. This vertical arrangement achieves proper signal-ground isolation while maintaining a relatively simple overall wiring architecture.
Solution Approach 2:
The patent combines the functions of signal transmission and ground reference into a unified vertical pad structure, where signal and ground pads are integrated components of the same connection interface. This merging approach simplifies the wiring structure by eliminating the need for separate lateral ground paths and complex multilayer routing.
3Reliability
If a multilayered wiring structure with vias is built to connect pads, then wiring resistance becomes very large, but connection between layers can be established
Solution Approach 1:
The patent addresses the wiring resistance issue by arranging signal and ground pads on different vertical layers with direct vertical connections, minimizing the length and number of vias required. This vertical stacking approach reduces the total via count compared to lateral routing paths that would require multiple vias to navigate between layers, thereby reducing overall wiring resistance and energy loss.
Data Source
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AI summary
A pad-array arrangement structure on a substrate for mounting an IC chip on the substrate, wherein a structure with which it is possible to maximally avoid an increase in the number of wiring layers on the substrate is obtained by devising the pad arrangement in an IC pad-array region. A embodiment of the present invention provides a pad-array structure on a substrate for mounting an IC chip on the substrate. The present invention is characterized in that: a plurality of ground pads arrayed equidistantly in a first row, and a plurality of signal pads arrayed equidistantly in a second row on the inside of and parallel to the first row, are provided on a first circumferential edge in the pad-array region; each of the signal pads passes between two adjacent ground pads in the first row and is connected to an external circuit on the substrate; and electrical signals are input to and output from the external circuit.