Semiconductor Pad Electrode Capacitance Reduction via Island Insulation
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Solution Overview
Problem
Conventional semiconductor packages experience stress and increased electrostatic capacitance due to thermal expansion differences between silicon substrates and organic resin printed circuit boards, leading to potential disconnections and signal propagation delays, especially when trying to reduce package size and thickness.
Innovation Solution
A semiconductor device with pad electrodes formed on thick island insulating films sandwiched between a thin insulating film and the silicon substrate, reducing electrostatic capacitance and stress concentration, allowing for smaller substrate thickness without warping, and enabling high-speed signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the diameter of solder balls is increased to enhance mechanical strength, then connection reliability is improved, but electrostatic capacitance between the silicon substrate and pad electrodes increases
Solution Approach 1:
The insulating film is designed with non-uniform thickness, being thicker at the periphery and thinner at the center beneath the pad electrode. This local variation in insulating film thickness allows the pad electrode to maintain larger diameter for mechanical strength while the thinner central region reduces electrostatic capacitance to acceptable levels.
2Loss of time
If the thickness of the insulating film is increased to reduce electrostatic capacitance, then signal propagation delay is reduced, but the silicon substrate becomes more prone to warping
Solution Approach 1:
The insulating film thickness is optimized locally: thicker at the periphery to reduce electrostatic capacitance and signal delay, and thinner at the center to reduce stress concentration and prevent substrate warping. This spatially varying thickness profile simultaneously addresses both concerns.
3Length of moving object
If the thickness of the silicon substrate is reduced to decrease package size, then package dimensions are minimized, but the substrate becomes more susceptible to warping from thermal expansion stress
Solution Approach 1:
The insulating film is designed with thicker peripheral regions that provide stress distribution and support, enabling the use of thinner silicon substrates without excessive warping. The localized structural reinforcement at the periphery compensates for the reduced overall substrate thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces electrostatic capacitance and stress on the silicon substrate, facilitating smooth wafer handling and high-speed signal transmission in semiconductor devices, while maintaining package reliability and reducing substrate warping.
Implementation Method 1
the electrostatic capacitance of the pad electrodes, i.e., the capacitance between the pad electrodes and the silicon substrate
Implementation Method 2
a stress occurs in the solder balls used for connection to the external circuit, due to a temperature change and a difference in the thermal expansion coefficient between the package, which is made of silicon, and the printed circuit board, which is made of organic resin
Data Source
AI summary
A semiconductor package includes a uniform thin insulating film covering the internal circuit formed on a silicon substrate. A plurality of thick island insulating films are formed underlying respective pad electrodes, which connect the internal circuit to an external circuit. The silicon substrate is polished from the bottom to have a thickness less than 0.6 mm. The thick island insulating films reduces an electrostatic capacitance of the pad electrodes to reduce the propagation delay of a signal passing through the pad electrodes.


