Pad-on-Pad Substrate Interconnects for Fine-Pitch Shorting Control

The patent applies local quality by making the pad-on-pad interconnects with varying widths and thicknesses at different locations. The interconnects have wider and thicker portions where shorting risk is higher, and narrower portions where space is constrained, thereby locally adapting the interconnect geometry to minimize shorting risk while maintaining fine pitch overall.

The patent implements the nesting principle by embedding one pad structure within another pad structure (pad-on-pad configuration). This nested arrangement allows interconnects to be stacked vertically through multiple dielectric layers, effectively reducing the horizontal footprint and package area while maintaining reliable electrical connections.

The patent transitions from two-dimensional planar interconnect routing to three-dimensional vertical routing by embedding pad-on-pad interconnects through multiple dielectric layers. This dimensional change allows more interconnects to be packed into a given region by utilizing the vertical dimension, thereby increasing interconnect density without proportionally increasing the risk of shorting between adjacent traces.

The patent applies local quality by varying the width and thickness of pad-on-pad interconnects at different locations based on local requirements. In regions with higher shorting risk, the interconnects are designed with greater width and thickness, while in other regions, they are optimized for minimal footprint, thereby locally adapting to maximize density while maintaining reliability.