Semiconductor Pad Oxide Layer GeO Removal via Selective Cleaning

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Solution Overview

Problem

The presence of germanium oxide (GeO) in the pad oxide layer of semiconductor devices affects their performance, and existing methods struggle to address this issue without compromising the integrity of the device by removing the entire pad oxide layer, which can lead to contamination from other impurities.

Innovation Solution

A method involving the formation of a pad oxide layer, followed by germanium ion implantation into the PMOS region, a first cleaning process to reduce the pad oxide layer thickness, an anneal process, and a second cleaning process to remove the pad oxide layer, ensuring only GeO2 remains, thereby improving device stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire pad oxide layer is removed to eliminate GeO, then device performance is improved, but contamination from other impurities occurs

Engineering Contradiction:
Improvedevice performanceVSAvoidcontamination from impurities
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by selectively removing pad oxide layer only from the PMOS region where GeO contamination occurs, while preserving the pad oxide layer in other regions. This is achieved through selective cleaning processes that target specific areas, eliminating GeO harmfully present in PMOS without causing widespread contamination, thus resolving the contradiction between improving device performance and preventing impurity contamination.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent extracts and removes only the harmful GeO component from the pad oxide layer through selective cleaning processes, while leaving the beneficial pad oxide layer intact in regions where it provides protection. This selective extraction eliminates the harmful factor (GeO) without removing the protective function of the pad oxide layer elsewhere, resolving the contradiction between eliminating contamination and maintaining device integrity.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If germanium ion implantation is performed to improve PMOS performance, then device performance is improved, but GeO forms in the pad oxide layer

Engineering Contradiction:
Improvedevice performanceVSAvoidGeO formation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful effect of GeO formation into a beneficial process by using the GeO formation as an indicator to guide selective removal. The GeO that forms during ion implantation is subsequently targeted and removed through selective cleaning processes, transforming the harmful byproduct into a useful marker for precision cleaning, thus resolving the contradiction between improving device performance through ion implantation and preventing GeO contamination.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent performs preliminary germanium ion implantation to improve PMOS performance before the device is completed, accepting that GeO will form. Then, a subsequent selective cleaning process is applied to remove the GeO. This two-step preliminary action sequence allows the performance benefits of ion implantation to be realized while subsequently eliminating the harmful GeO byproduct, resolving the contradiction between performance improvement and contamination prevention.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the thickness of the pad oxide layer to improve device performance by eliminating GeO, which degrades performance, while maintaining the integrity of the semiconductor device by only partially removing the pad oxide layer, thus preventing contamination from other impurities.

Implementation Method 1

performing an implantation process to inject germanium (Ge) into the substrate on the PMOS region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

performing an anneal process

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11107689B2Method for fabricating semiconductor device
Publication Date: 2021.08.31 UNITED MICROELECTRONICS CORP
  • US11107689B2 patent drawing
  • US11107689B2 patent drawing
  • US11107689B2 patent drawing

AI summary

A method for fabricating semiconductor device includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a pad oxide layer on the substrate, wherein the pad oxide layer comprises a first thickness; performing an implantation process to inject germanium (Ge) into the substrate on the PMOS region; performing a first cleaning process to reduce the first thickness of the pad oxide layer on the PMOS region to a second thickness; performing an anneal process; and performing a second cleaning process to remove the pad oxide layer.