Padding Addition Mechanism for Data Alignment in Parallel Computer Systems
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Solution Overview
Problem
In parallel computer systems, data alignment issues lead to increased latency during memory writes, particularly when data is not aligned with ECC generation units or cache line sizes, resulting in inefficiencies in data transmission and processing.
Innovation Solution
The implementation of a padding addition mechanism that determines the necessity of data adjustment based on size and address information, generating padding-added data to align it with specific sizes, thereby optimizing storage and transmission processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If data is not aligned with ECC generation unit size, then data can be stored flexibly, but write latency increases due to recalculation of ECC
Solution Approach 1:
The patent applies preliminary action by adding padding to data before storage to ensure alignment with ECC generation unit size. This pre-alignment prevents the need for recalculation of ECC during write operations, thereby reducing write latency while maintaining flexible data storage capabilities.
2Adaptability or versatility
If received data is not aligned with cache line size, then data can be cached flexibly, but latency increases due to unnecessary write-back to main memory
Solution Approach 1:
The patent applies preliminary action by aligning received data with cache line size before caching through padding addition. This ensures that data is properly aligned when stored in cache memory, preventing unnecessary write-back operations to main memory and reducing cache latency while maintaining flexible caching.
3Loss of time
If data alignment checks and adjustments are performed, then write latency is reduced, but device complexity increases
Solution Approach 1:
The patent introduces a padding addition unit as an intermediary component that automatically aligns data with required boundaries before storage. This mediator handles the alignment checks and adjustments, reducing write latency while managing the complexity through a dedicated alignment processing module.
4Productivity
If padding is added to align data, then storage efficiency improves, but data transmission volume increases
Solution Approach 1:
The patent applies local quality by adding padding only to the extent necessary for alignment with ECC units and cache lines, rather than uniformly padding all data. This targeted approach improves storage efficiency and reduces unnecessary data transmission volume by minimizing padding addition to only what is required for proper alignment.
Data Source
AI summary
An information processing apparatus includes: storage devices that store data; a data generation unit that generates padding-added data by adding padding to the data, based on adjustment information included in received data; and a storage processing unit that stores the padding-added data generated by the data generation unit in the storage devices. It is possible to shorten a latency even when non-aligned data is received.