Padless IC Package System with Segmented Die Supports
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Solution Overview
Problem
Existing integrated circuit package technologies face challenges in achieving low cost, low profile, and high yield while maintaining robust electrical performance, as they often result in manufacturing yield problems, package warpage, and electromagnetic coupling issues due to the integration of more functions into smaller spaces.
Innovation Solution
A padless integrated circuit package system is developed using a die support system formed from a lead frame with equally spaced die supports and lead fingers, which eliminates the need for die-attach paddles and reduces the package height, handling issues, and electromagnetic interference by using a bonding material that can be snap-cured or non-curable, allowing for immediate wire bonding and improved epoxy coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If padless packages with lead fingers are used to reduce package height, then package height is reduced, but manufacturing yield problems occur due to package warpage and delamination
Solution Approach 1:
The lead frame is segmented into distinct functional regions: die support portions that provide mechanical support and lead finger portions that provide electrical connection. This segmentation allows the die support to be optimized for structural stability while lead fingers are optimized for electrical function, resolving the conflict between low profile and manufacturing reliability.
Solution Approach 2:
Different portions of the lead frame are given different properties: the die support portions have increased structural rigidity and appropriate spacing to prevent warpage, while the lead fingers maintain electrical conductivity. This local differentiation resolves the contradiction by providing structural support where needed without compromising overall package height reduction.
2Adaptability or versatility
If integrated circuits are stacked into a single package to increase functionality, then more functions are integrated, but package dimensions are not reduced and cost decreases are limited
Solution Approach 1:
The patent transitions from two-dimensional planar packaging to three-dimensional vertical stacking by implementing multiple die support levels. Integrated circuits can be stacked vertically on different levels of the lead frame, increasing functionality while maintaining a compact footprint and reducing overall package volume.
3Length of stationary object
If thinned wafers are used to reduce cost and package height, then package height and cost are reduced, but handling and manufacturing problems increase resulting in damaged wafers and reduced yields
Solution Approach 1:
The lead frame structure provides inherent mechanical support and cushioning for the integrated circuit dies before they are fully assembled. The die support portions with appropriate spacing and rigidity protect thin wafers from handling damage during manufacturing processes, enabling the use of thinned wafers without compromising yield or ease of manufacture.
Data Source
AI summary
An integrated circuit package system is provided forming a die support system from a padless lead frame having die supports with each substantially equally spaced from another, and attaching an integrated circuit die having a peripheral area on the die supports.


