Page Buffer Cache Switching During Program Suspend Resume

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Solution Overview

Problem

Existing memory systems face issues with increased trigger rates due to voltage level shifts in memory cells caused by program suspend and resume operations, leading to higher bit error rates and inefficient read error handling, which adversely affect quality of service.

Innovation Solution

Implementing a memory system with a page buffer having multiple data caches and a controller that manages program operations, ensuring program data is handled appropriately during suspend and resume to prevent data overwrite, thereby maintaining accurate voltage levels and reducing trigger rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If program operations are suspended to service read operations, then quality of service is improved, but voltage level shifts occur in memory cells leading to increased trigger rates

Engineering Contradiction:
Improvequality of serviceVSAvoidtrigger rate
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a read verify operation before resuming the program operation. This verify operation checks the voltage levels of memory cells that were programmed before suspension, allowing the system to detect and correct voltage shifts before they cause errors. The read verify acts as a preventive measure that maintains reliability while enabling program suspension for quality of service.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If program suspend and resume operations are implemented, then flexibility in operation is improved, but bit error rates increase due to voltage level shifts

Engineering Contradiction:
Improveoperation flexibilityVSAvoidbit error rate
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements feedback by using the read verify operation to detect voltage level shifts in memory cells after program suspension. The results of this verification are fed back to the control logic, which then adjusts subsequent program operations accordingly. This closed-loop feedback mechanism corrects voltage drift caused by suspension, maintaining low bit error rates while preserving operational flexibility.

Inventive Principle:
Principle #23Feedback

3Productivity

If multiple suspend and resume operations occur, then read operation servicing is improved, but threshold voltage distributions become unstable

Engineering Contradiction:
Improveread operation servicingVSAvoidthreshold voltage distribution
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent applies preliminary action by performing read verify operations before each program resume to detect and account for voltage shifts accumulated during suspension. This preliminary verification stabilizes the threshold voltage distribution by identifying drift early, allowing the system to maintain stable voltage levels even after multiple suspend-resume cycles while continuing to service read operations efficiently.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260037272A1Trigger rate improvement post program suspend
Publication Date: 2026.02.05 MICRON TECHNOLOGY INC
  • US20260037272A1 patent drawing
  • US20260037272A1 patent drawing
  • US20260037272A1 patent drawing

AI summary

One method includes suspending a program operation being performed on a group of memory cells. Prior to resuming the program operation, a program status corresponding to the program operation can be determined. The method includes, responsive to determining a first program status and prior to resuming the program operation: overwriting first program data stored in a first data cache of a page buffer with second program data stored in a second data cache of the page buffer; and resuming the program operation in the absence of the first program data. The method includes, responsive to determining a second program status and prior to resuming the program operation: preventing the first program data stored in the first data cache from being overwritten with the second program data stored in the second data cache; and resuming the program operation utilizing the first program data in the absence of the second program data.