Page Buffer Continuous Read Circuit for Faster NAND Recovery

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Solution Overview

Problem

Semiconductor devices face challenges in maintaining data integrity without continuous power supply while achieving fast data processing speeds, particularly in nonvolatile memory devices, and there is a need to improve read performance during continuous read requests.

Innovation Solution

A semiconductor device with a page buffer array and continuous read determination circuit that encodes and stores data across multiple memory cells, allowing for efficient decoding and sensing of coding data to enhance read performance during continuous read requests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is stored in nonvolatile memory cells, then data integrity is maintained without continuous power supply, but data processing speed becomes slow

Engineering Contradiction:
Improvedata integrityVSAvoiddata processing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The memory system is divided into multiple memory cells (first memory cell and second memory cell) that store different portions of data (first data and second data). This segmentation allows parallel access and processing of different data segments, improving overall read speed while maintaining the reliability benefits of nonvolatile memory.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a continuous read determination circuit that proactively identifies and prepares for continuous read requests before they are fully executed. By detecting patterns of consecutive read operations, the system can pre-load data into page buffers and optimize the read pipeline in advance, reducing latency and improving processing speed for anticipated operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If continuous read requests are processed sequentially, then data integrity is maintained, but read operation time increases

Engineering Contradiction:
Improvedata integrityVSAvoidread operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements a continuous read determination circuit that detects and identifies sequences of continuous read requests. When such sequences are detected, the system activates optimized read paths and pre-loads data into page buffers, ensuring that the useful action of data retrieval continues without interruption or idle cycles between operations, thereby reducing total read time while maintaining data integrity.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The system proactively detects continuous read request patterns and prepares data in advance by loading it into page buffers before the actual read operations commence. This preliminary action eliminates wait times and ensures that data is ready for immediate retrieval, significantly reducing read operation time while preserving data integrity through controlled buffer management.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If multiple memory cells are used to store encoded data, then read performance is improved during continuous reads, but device complexity increases

Engineering Contradiction:
Improveread performanceVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Data is divided into multiple segments stored in separate memory cells, with each cell containing a portion of the encoded data. This segmentation enables parallel read operations across multiple cells, improving read performance through concurrent data retrieval while keeping each individual memory cell relatively simple in structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The page buffer array is designed to serve multiple functions: it stores data from multiple memory cells, performs buffering for continuous read operations, and facilitates data reconstruction from distributed encoded portions. This multi-functionality improves read performance without requiring separate dedicated circuits for each function, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12499938B2Semiconductor device for improving performance in continuous read and operation method of semiconductor device
Publication Date: 2025.12.16 SK HYNIX INC
  • US12499938B2 patent drawing
  • US12499938B2 patent drawing
  • US12499938B2 patent drawing

AI summary

A semiconductor device includes a page buffer array and a continuous read determination circuit configured to determine a continued read request for pages in which encoded data are stored, based on an address and a command that are received from a host. When it is determined that a request that is received from the host is the continued read request, the page buffer array is controlled to sense and store coding data of a page in which the coding data have been stored and to use the sensed coding data in a subsequent read operation.