Page Buffer Latch Control for Single-to-Multi-Level NAND Programming
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current nonvolatile memory devices face challenges in ensuring data reliability and efficient data conversion between single-level and multi-level data storage, particularly in portable electronic devices where power consumption and storage speed are critical.
Innovation Solution
A nonvolatile memory device with a page buffer comprising latches for storing data in different states and control logic to manage data conversion using multi-conversion program and single conversion read commands, enabling efficient storage and retrieval of data across memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is stored in single-level format, then storage speed is improved, but storage density and reliability deteriorate
Solution Approach 1:
The page buffer is divided into multiple latches (first latch, second latch, third latch) that can independently store different portions of data in different states. This segmentation allows simultaneous handling of single-level data for speed and multi-level data for reliability without compromising either aspect.
Solution Approach 2:
The system dynamically switches between single-level and multi-level data storage modes based on the programming command received. The control logic configures the latches to store data in appropriate states (first state, second state, third state) depending on whether single-level or multi-level programming is required, optimizing both speed and reliability as needed.
2Quantity of substance
If multi-level data storage is used, then storage density is improved, but conversion complexity and power consumption increase
Solution Approach 1:
The same page buffer structure with multiple latches serves dual purposes: it handles both single-level data storage (for speed) and multi-level data storage (for density). The latches can be configured to store data in different states, making the hardware universal and avoiding the need for separate conversion circuits, thus reducing complexity.
Solution Approach 2:
The control logic automatically configures the latches to the appropriate state based on the received programming command. When a multi-level programming command is received, the control logic directs data to be stored in multiple latches in different states, performing the conversion internally without requiring external intervention or complex external conversion circuits.
3Reliability
If multiple latches are used for data conversion, then data reliability is improved, but power consumption increases
Solution Approach 1:
The system dynamically activates only the necessary latches based on the programming command. When single-level programming is required, only the first latch is actively used for fast storage. When multi-level programming is required, the control logic activates additional latches (second latch, third latch) to store data in multiple states, optimizing power consumption by avoiding continuous activation of all latches.
Solution Approach 2:
Different latches are used with different qualities/functions based on the storage requirement. The first latch handles high-speed single-level data storage, while the second and third latches are engaged only when multi-level storage is needed for enhanced reliability. This local differentiation optimizes the balance between reliability and power consumption.
Data Source
AI summary
A nonvolatile memory device includes a memory cell array, a page buffer including a first latch configured to store data to be programmed in a first state, a second latch configured to store the data in a second state, and a third latch configured to store the data in a third state when the data is received from an external apparatus, and a control logic configured to control the page buffer to store the data of the first state in the first latch, the data of the second state in the second latch, and the data of the third state in the third latch when a multi-conversion program command and the data are received from the external apparatus.