Page Buffer Latch Control for Multi-Level NAND Data Conversion
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Solution Overview
Problem
Current nonvolatile memory devices face challenges in data reliability and efficiency, particularly in converting single-level data to multi-level data for programming and vice versa, which affects storage capacity and access speed in portable electronic devices.
Innovation Solution
A nonvolatile memory device with a page buffer including latches to store data in different states and control logic to manage these states during multi-conversion programming and single-conversion reading operations, enabling efficient data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If single-level data is converted to multi-level data for programming, then storage capacity is improved, but data reliability deteriorates
Solution Approach 1:
The page buffer is divided into multiple latches (first latch, second latch, third latch) that can independently store different data states. This segmentation allows the system to handle single-level and multi-level data conversions separately, maintaining data integrity while increasing storage capacity through multi-level cell programming.
2Productivity
If multi-level data is used for programming, then storage efficiency is improved, but access speed deteriorates
Solution Approach 1:
The control logic dynamically configures the page buffer latches based on the programming mode. During multi-conversion programming, the latches are configured to handle multi-level data for improved storage efficiency. During single-conversion reading, the latches are reconfigured to prioritize access speed, allowing the system to adapt its behavior to current operational requirements.
3Reliability
If multiple latches are used in page buffer, then data reliability is improved, but device complexity increases
Solution Approach 1:
The multiple latches in the page buffer serve multiple functions: they can store single-level data, multi-level data, and intermediate conversion states. This multi-functionality allows the same hardware structure to support both high-reliability single-level operations and high-capacity multi-level operations, reducing the need for separate dedicated structures for each function.
Data Source
AI summary
A nonvolatile memory device includes a memory cell array, a page buffer including a first latch configured to store data to be programmed in a first state, a second latch configured to store the data in a second state, and a third latch configured to store the data in a third state when the data is received from an external apparatus, and a control logic configured to control the page buffer to store the data of the first state in the first latch, the data of the second state in the second latch, and the data of the third state in the third latch when a multi-conversion program command and the data are received from the external apparatus.