Page Buffer Accumulation for Faster Non-Volatile Memory Programming
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Solution Overview
Problem
Non-volatile memory devices, such as flash memory, suffer from slow read and write speeds compared to volatile memory devices, and they retain data only when power is off, limiting their performance in computing systems.
Innovation Solution
A non-volatile memory device with a memory cell array comprising multiple physical pages, each selected by different word and string selection lines, and a page buffer circuit that performs sequential program operations, data accumulation, and verify operations to enhance programming efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flash memory devices support various operation modes to maximize advantages, then data retention and capacity are improved, but read and write speeds deteriorate
Solution Approach 1:
The memory device is divided into multiple memory blocks, each containing multiple physical pages. This segmentation allows parallel processing of multiple pages across different blocks, improving overall programming speed while maintaining the non-volatile data retention characteristic of flash memory.
Solution Approach 2:
The page buffer circuit performs preliminary data accumulation and preparation before the actual program operation. By pre-processing data in the page buffer and performing verify operations on previously programmed pages, the system reduces the total programming time while maintaining data integrity and retention.
2Reliability
If sequential program operations are performed on multiple physical pages, then data retention is maintained, but programming time increases
Solution Approach 1:
The page buffer circuit continuously accumulates data from multiple physical pages during program operations. Instead of waiting for each page to complete programming before starting the next, the system maintains continuous data preparation and verification activities, reducing idle time and improving programming efficiency while ensuring data retention through verify operations.
Solution Approach 2:
Data for subsequent pages is accumulated and prepared in the page buffer circuit before the actual program operation commences. This preliminary data preparation overlaps with the programming of previous pages, reducing total programming time while maintaining data integrity through verify operations.
3Productivity
If data accumulation and verify operations are performed on multiple physical pages, then programming efficiency is improved, but device complexity increases
Solution Approach 1:
The page buffer circuit is designed to perform multiple functions: data accumulation from multiple physical pages, data preparation for programming, and verify operations on programmed pages. This multi-functionality consolidates what could be separate circuits into a single versatile component, improving programming efficiency while minimizing the increase in device complexity.
Data Source
AI summary
a non-volatile memory device comprising a memory cell array including a first physical page and a second physical page, wherein the first physical page includes first memory cells connected to the first word line and the second physical page includes second memory cells connected to the first word line, a row decoder configured to sequentially perform a first program operation on the first memory cells of the first physical page and perform a second program operation on the second memory cells of the second physical page, a page buffer circuit configured to perform an accumulation operation on first and second data for generating a accumulated data, and to perform a verify operation on the first and second memory cells based on the accumulated data, and a control logic configured to determine whether the first and second memory cells passed the program operations based on the result of the verify operation.