Page Buffer Read Timing for Adjacent Cell Interference

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Solution Overview

Problem

Nonvolatile memory devices face challenges in maintaining data integrity and processing speed due to reduced cell size, leading to errors from adjacent memory cell interference during read operations.

Innovation Solution

A semiconductor device operating method that involves sensing a target memory cell at multiple times with different read voltages and using a page buffer with multiple latches to store and output data based on adjacent cell values, enhancing read operation speed and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the memory device is reduced in size, then miniaturization and low power consumption are achieved, but errors occur during read operations due to adjacent memory cell interference

Engineering Contradiction:
Improvememory device sizeVSAvoiddata integrity
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by sensing the adjacent memory cell before sensing the target memory cell. The sensed value of the adjacent cell is used to determine the appropriate read voltage level for the target cell, preventing interference errors before they occur. This is implemented through operations 520-530 where the adjacent cell is sensed first, and its value dictates the voltage level selection for subsequent target cell sensing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the read voltage parameter dynamically based on the adjacent cell's sensed value. Two different read voltage levels (first read voltage and second read voltage) are applied to the target cell depending on whether the adjacent cell contains a logic high or logic low value. This parameter adaptation resolves the interference issue caused by fixed-size memory cell structures.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If multiple sensing operations are performed with different voltages, then read operation accuracy is improved, but read operation time increases

Engineering Contradiction:
Improvedata sensing accuracyVSAvoidread operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The adjacent memory cell sensing operation (operation 520) serves as a preliminary action that determines the subsequent sensing strategy. By sensing the adjacent cell first, the system can select the appropriate read voltage level before sensing the target cell, enabling accurate single-stage sensing instead of requiring multiple sequential sensing operations with different voltages.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamic voltage selection where the read voltage level applied to the target cell changes based on the adjacent cell's value. This dynamic adaptation allows the system to achieve high measurement precision through a single sensing operation rather than multiple fixed-voltage operations, thereby reducing the time loss.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260037147A1Operating method of page buffer for read operation of semiconductor device
Publication Date: 2026.02.05 SK HYNIX INC
  • US20260037147A1 patent drawing
  • US20260037147A1 patent drawing
  • US20260037147A1 patent drawing

AI summary

An operating method of a semiconductor device includes receiving a read command and sensing a memory cell adjacent to a target memory cell of the read command. The method also includes sensing the target memory cell at a first sensing time and sensing the target memory cell at a second sensing timing. The method further includes outputting, as data, a value sensed at the first sensing time or a value sensed at the second sensing time on the basis of a sensing value of the memory cell adjacent to the target memory cell.