Page Buffer Status Reads for Faster Nonvolatile Memory

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Solution Overview

Problem

Existing nonvolatile memory devices inefficiently handle the read operation for large capacity status data due to the need for sequential read requests, which reduces the operating speed of the storage device.

Innovation Solution

Implementing a nonvolatile memory device with a status data memory circuit and a page buffer circuit that allows for a single status data group read command to accumulate and output multiple status data items simultaneously, improving the operating efficiency by reducing the number of read requests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If sequential read requests are used for status data, then the memory device can handle read operations with simple circuit design, but the operating speed of the storage device decreases

Engineering Contradiction:
Improvecircuit design complexityVSAvoidoperating speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent merges multiple status data items into a single accumulated data set in the page buffer circuit, allowing one read operation to retrieve multiple status data items simultaneously. This combining approach increases operating speed without significantly increasing circuit complexity, as it utilizes existing buffer and control circuitry.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The page buffer circuit preliminarily accumulates multiple status data items before the actual read operation occurs. This preliminary accumulation prepares the data in advance, enabling faster retrieval when a read command is issued, thus improving operating speed without requiring complex real-time processing circuits.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If multiple read requests are issued for status data, then the memory device can maintain simple control logic, but the number of read requests increases reducing overall efficiency

Engineering Contradiction:
Improvecontrol logic complexityVSAvoidoperating efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The page buffer circuit is designed to serve multiple functions: it can buffer user data for normal read operations and simultaneously accumulate status data items for efficient status reads. This multi-functionality allows the same circuit to handle both single-item and multi-item reads, improving productivity without requiring separate dedicated circuits for status data.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the accumulation of multiple status data items into a single buffer location, allowing the control logic to issue one read command to retrieve all accumulated status data. This merging reduces the number of read requests from multiple sequential operations to a single operation, significantly improving operating efficiency.

Inventive Principle:
Principle #5Merging (Combining)

3Quantity of substance

If status data is read one item at a time, then the memory device uses less buffer capacity, but the read operation capacity is limited

Engineering Contradiction:
Improvebuffer capacity usageVSAvoidread operation capacity
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The page buffer circuit continuously accumulates status data items as they become available, maintaining a ready supply of status data for retrieval. This continuous accumulation ensures that when a read command is issued, all available status data can be output in one operation, maximizing read operation capacity while using the existing buffer capacity efficiently.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The system preliminarily loads multiple status data items into the page buffer before the read operation is initiated. This preliminary loading of data into the buffer increases the read operation capacity to handle multiple items simultaneously, while the buffer capacity requirement remains within acceptable limits since it uses existing buffer resources.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12504921B2Nonvolatile memory device and operation method thereof, and storage device including the same
Publication Date: 2025.12.23 SAMSUNG ELECTRONICS CO LTD
  • US12504921B2 patent drawing
  • US12504921B2 patent drawing
  • US12504921B2 patent drawing

AI summary

A nonvolatile memory device that includes a memory cell array including a plurality of nonvolatile memory cells; a page buffer circuit connected to the memory cell array; a status data memory circuit storing a first plurality of status data items; a control logic circuit controlling the status data memory circuit to accumulate the first plurality of status data items in the page buffer circuit, in response to a first status data group read command provided from an external device; and an input/output circuit outputting the first plurality of status data items accumulated in the page buffer circuit to the external device.