Page Buffer Circuit Strobe Control for Voltage Drop Reduction
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Solution Overview
Problem
Semiconductor memory devices face challenges in reducing power supply voltage drops during verify and read operations, which can lead to erroneous sensing and inefficiencies in data retrieval.
Innovation Solution
The implementation of a semiconductor memory device with a page buffer circuit that senses program states through bit lines and performs latch operations using strobe signals with varying activation periods, preventing simultaneous data latch operations across page buffers and thus minimizing power supply voltage drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If page buffers perform latch operations simultaneously during verify or read operations, then data sensing speed is improved, but power supply voltage drop increases causing erroneous sensing
Solution Approach 1:
The patent applies periodic action by generating multiple strobe signals with different activation periods to control page buffers to perform latch operations alternately rather than simultaneously. This periodic control divides the sensing operation into sequential phases, reducing peak current demand while maintaining overall sensing speed through coordinated operation of multiple page buffers across different time periods.
2Productivity
If multiple page buffers perform latch operations simultaneously, then data retrieval efficiency is improved, but power supply voltage drop increases
Solution Approach 1:
The patent applies segmentation by dividing the page buffer circuit into multiple independent page buffers that operate separately with individually controlled latch operations. Each page buffer is assigned a specific time period through dedicated strobe signals, segmenting the overall sensing operation into non-overlapping phases. This segmentation allows data retrieval from multiple memory cells to proceed in sequence without simultaneous power demands, reducing voltage drop while maintaining overall productivity.
3Measurement precision
If page buffers operate with extended activation periods to complete sensing, then sensing accuracy is improved, but power consumption increases causing voltage drop
Solution Approach 1:
The patent implements periodic action through strobe signals that activate each page buffer for specific, non-overlapping time periods. This allows each page buffer to operate with sufficient activation duration for accurate sensing within its assigned period, while the overall system maintains lower power consumption by ensuring no two page buffers draw power simultaneously. The periodic alternation preserves measurement precision for each individual sensing operation while controlling total energy usage.
Data Source
AI summary
Provided herein is a semiconductor memory device. The semiconductor memory device may include a memory cell array including a plurality of memory cells coupled to a plurality of bit lines and a page buffer circuit coupled to the plurality of bit lines and including a plurality of page buffers, wherein the plurality of page buffers sense program states of the plurality of memory cells through the plurality of bit lines during a verify operation or a read operation of a program operation, and wherein the plurality of page buffers perform in an alternate way a latch operation for latching sensing data in accordance with current amounts of the plurality of bit lines.