Page Buffer Sensing Circuit for NAND Threshold Voltage Calibration
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Solution Overview
Problem
As memory devices increase in functionality, capacity, and integration, channel resistance increases, leading to decreased cell current and varying characteristics among page buffers due to process variation, affecting data sensing accuracy.
Innovation Solution
A memory device with a page buffer circuit that includes a sensing node, data transfer node, and transistors to precharge and calibrate threshold voltage deviations, enhancing data sensing accuracy by boosting and deboosting the sensing node to maintain optimal voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory devices increase in capacity and integration, then storage capacity increases, but channel resistance increases and cell current decreases
Solution Approach 1:
The sensing node is precharged to a threshold voltage level before the actual sensing operation begins. This preliminary action ensures that the sensing node starts at an optimal voltage level, compensating for the reduced cell current caused by increased channel resistance in high-capacity memory devices.
Solution Approach 2:
The patent dynamically adjusts the voltage level of the sensing node during the sensing operation. By boosting the sensing node voltage when cell current is weak (due to high channel resistance) and deboosting when cell current is strong, the system maintains optimal sensing conditions across varying memory device capacities and process conditions.
2Productivity
If memory devices increase in integration, then device density increases, but process variation causes characteristics differences among page buffers
Solution Approach 1:
Each page buffer unit independently controls the voltage level of its own sensing node through local transistor control (third and fourth transistors). This localized control allows each page buffer to compensate for its specific process variations independently, ensuring consistent operation across all page buffers despite manufacturing variations in high-density integrated circuits.
3Quantity of substance
If channel resistance increases, then cell current decreases, but data sensing accuracy deteriorates
Solution Approach 1:
The patent dynamically changes the voltage parameter of the sensing node based on the strength of the cell current. When channel resistance is high and cell current is weak, the sensing node voltage is boosted to enhance sensing capability. When channel resistance is low and cell current is strong, the sensing node voltage is deboosted to prevent saturation. This dynamic parameter adjustment maintains optimal sensing accuracy across varying current conditions.
Data Source
AI summary
A memory device includes a memory cell array, and a plurality of page buffer units, the page buffer units each including a sensing node, a data transfer node, a first transistor precharging the data transfer node, a second transistor connecting the sensing node to the data transfer node, a sensing latch connected to the data transfer node, a third transistor changing a data value of the sensing latch, and a fourth transistor connecting the third transistor to the data transfer node, wherein, during a sensing operation, in a first time period, the sensing node is precharged based on a first path through the first transistor, the data transfer node, and the fourth transistor, and in a second time period, a voltage of the sensing node is set to a threshold voltage according to a second path through the fourth transistor, the data transfer node, and the third transistor.