Page Descriptor Store for Cross-Architecture Code Translation
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Solution Overview
Problem
Existing program code conversion methods face challenges in handling page protection faults when converting code from one processor type to another, especially when the original code relies on finer page protection granularity than supported by the target hardware, leading to inconsistencies in memory access permissions.
Innovation Solution
A computing system and method that includes a translator unit converting subject code into target code, with a page descriptor store maintaining subject page access attributes, allowing memory access without interruption if within the scope of these attributes, thereby emulating correct page protection fault behavior across different processor architectures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If program code is converted from one processor type to another, then code portability and execution on target platform is improved, but page protection fault handling accuracy deteriorates due to differences in page granularity support
Solution Approach 1:
The patent introduces a page descriptor store as an intermediary data structure that maps subject code page references to target code page references. This mediator translates fine-grained subject page protection attributes into coarse-grained target page protection attributes, enabling accurate page protection fault handling across different processor architectures with different page granularity support.
Solution Approach 2:
The patent transforms page protection attributes by changing the granularity parameter. Subject code page protection attributes at fine granularity are converted to target code page protection attributes at coarse granularity through the page descriptor store, which stores mapping relationships between subject pages and target pages. This parameter transformation maintains page protection semantics while adapting to different hardware capabilities.
2Measurement precision
If fine page size granularity is supported in subject code, then memory access precision and security are improved, but execution compatibility on platforms with coarser granularity deteriorates
Solution Approach 1:
The patent segments the address space mapping by introducing page descriptors that divide the subject code address space into fine-grained pages and map them to coarse-grained target pages. Each page descriptor contains mapping information that enables precise tracking of subject page boundaries while presenting a coarser granularity to the target platform, thus maintaining both precision and compatibility.
Solution Approach 2:
The page descriptor store acts as an intermediary layer between subject code and target code, translating fine-grained page references into coarse-grained page references. This mediator enables the target platform with coarser granularity to execute subject code that requires fine granularity, maintaining execution compatibility while preserving memory access precision through the mapping relationships.
3Device complexity
If traditional exception handling mechanisms are used, then implementation simplicity is maintained, but handling of cross-page exceptions becomes complex and error-prone
Solution Approach 1:
The patent performs preliminary actions by pre-establishing page descriptor mappings before code execution. The page descriptor store is populated with mapping relationships between subject pages and target pages in advance, so that during execution, page protection fault handling can proceed systematically by consulting the pre-computed mappings, rather than dealing with complex cross-page exception scenarios dynamically.
Solution Approach 2:
The page descriptor store serves as an intermediary that simplifies exception handling by providing a clear mapping between subject code pages and target code pages. When a page protection fault occurs, the system can use the page descriptors to determine the corresponding subject page and handle the exception appropriately, reducing the complexity of cross-page exception handling.
Data Source
AI summary
Method and apparatus for handling page protection faults in combination particularly with the dynamic conversion of binary code executable by a one computing platform into binary code executed instead by another computing platform. In one exemplary aspect, a page protection fault handling unit is used to detect memory accesses, to check page protection information relevant to the detected access by examining the contents of a page descriptor store, and to selectively allow the access or pass on page protection fault information in accordance with the page protection information.