Page Fault Handler Selective Memory Logging
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Solution Overview
Problem
High-end computer systems experience prolonged downtime due to slow HDD write times during memory dumps, which is unacceptable in commercial computing environments, especially when dealing with substantial physical memory capacities.
Innovation Solution
A data processing system with a memory management unit that includes a translation lookaside buffer (TLB) and a page fault/TLB miss handler to selectively store address translation data and memory access data, reducing the amount of information needed for crash analysis and minimizing downtime by logging only relevant data types and categories.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If a complete memory dump is performed to record all content of system memory, then crash analysis completeness is improved, but system downtime increases significantly
Solution Approach 1:
The patent extracts only the essential memory data needed for crash analysis by utilizing page fault/TLB miss handler to identify and log only accessed pages. This selective extraction approach captures critical information while excluding unnecessary memory content, thereby reducing dump size and write time without sacrificing crash analysis completeness.
Solution Approach 2:
The system performs preliminary actions by pre-configuring the page fault/TLB miss handler to automatically log memory access data before crashes occur. This preliminary logging of accessed pages ensures that critical crash information is captured in advance, reducing the need for complete memory dumps during actual crash scenarios.
2Quantity of substance
If kernel memory dump is used to reduce dump size, then storage requirements are reduced, but useful crash information may be omitted
Solution Approach 1:
The patent implements feedback mechanisms through the page fault/TLB miss handler that monitors and logs actual memory access patterns. This feedback from real memory access behavior allows the system to dynamically identify which memory pages are actually accessed during crashes, ensuring that crash-relevant information is captured regardless of whether it falls into kernel or user mode categories.
Solution Approach 2:
The system changes the parameter of data selection from static categories (kernel vs user memory) to dynamic selection based on actual access patterns. By using TLB miss handler to track real memory accesses, the system adapts its dumping strategy to capture only actually accessed pages, ensuring completeness while maintaining reduced size.
3Loss of information
If memory dump is performed on high-end systems with large physical memory, then crash analysis coverage is improved, but write time increases significantly
Solution Approach 1:
For high-end systems with large memory capacities, the patent extracts only the subset of memory pages that are actually accessed during operation. The page fault/TLB miss handler identifies these accessed pages and logs them separately, enabling crash analysis coverage to be maintained while writing only the necessary data, thus preserving high write speeds.
Solution Approach 2:
The patent segments the memory dump process into two parts: (1) continuous logging of accessed pages by the page fault/TLB miss handler during normal operation, and (2) selective writing of only these logged pages during crash scenarios. This segmentation eliminates the need to write entire memory spaces, maintaining productivity while ensuring comprehensive crash analysis coverage.
Data Source
AI summary
A data processing system for logging memory access data; the data processing system having a memory management unit to support a virtual memory environment having a first data structure to store address translation data (VPN1 . . . VPNN, PPN1 . . . PPNn) to relate a virtual address to a corresponding physical address of a physical memory; a page fault/TLB miss handler to store page fault data, associated with the page fault, in a second data structure in response to a page fault; and a dump manager to store, in response to an event, memory access data derived from the physical memory according to at least a portion of the page fault data.