Page-Flipping Network Interface Controller for Packet Processing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increased burden of packet processing in network traffic due to rising speeds and traffic volumes is not adequately addressed by current memory access improvements, leading to delays from frequent memory operations in host systems.
Innovation Solution
Implementing page-flipping in network interface controllers to eliminate the need for data copying by remapping virtual pages to physical pages where packet data is stored, allowing direct access to packet data without the need for protocol stack copying operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional packet processing with multiple memory operations is used, then data can be transferred between network interface controller and application, but processing time increases due to frequent memory access delays
Solution Approach 1:
The patent uses page flipping to create a virtual copy mechanism where the application sees a stable virtual address space while the actual packet data is stored in different physical memory pages. Instead of physically copying data multiple times between different memory locations, the system flips page mappings to present new data to the application, eliminating redundant copy operations and reducing memory access delays while maintaining the illusion of data copying for the application layer
Solution Approach 2:
The patent introduces a page flipping mechanism as an intermediary layer between the network interface controller and the application. This intermediary manages the mapping between virtual addresses and physical memory pages, allowing the system to optimize memory access patterns without requiring changes to the application or network interface controller, thus reducing processing time while maintaining compatibility
2Productivity
If processor speed is increased to handle more packets, then packet processing capacity improves, but memory access speed does not keep pace, creating bottlenecks
Solution Approach 1:
The patent implements preliminary action by pre-allocating memory pages and preparing the page flipping structure in advance. Memory pages are pre-mapped and the page flipping mechanism is set up before packet processing begins, allowing the system to quickly switch between data pages during processing without requiring dynamic memory allocation or complex address translation during high-speed packet handling, thus keeping pace with increased processor speeds
3Reliability
If multiple memory operations are performed for each packet (copying, lookup, etc.), then complete packet processing is achieved, but processing efficiency decreases
Solution Approach 1:
The patent merges multiple memory operations into a single efficient page flip operation. Instead of performing separate copy operations, lookup operations, and data transfer operations that traditionally required multiple memory accesses, the system combines these functions into a unified page flipping mechanism that atomically switches the virtual-to-physical memory mapping, presenting new packet data to the application in a single operation while maintaining complete packet processing functionality
Data Source
AI summary
In general, in one aspect, the disclosure describes a method that includes accessing a packet, determining a flow associated with the packet, and determining, based at least in part on the packet, whether to remove the flow from a list of flows to handle using page-flipping.