Page-Level Load Order Queue for Speculative Execution
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Solution Overview
Problem
Existing processor architectures face performance limitations due to the full load order queue when speculatively executed load instructions target the program stack, as they disproportionately fill the queue, preventing further speculative execution.
Innovation Solution
Implementing a page-level tracked load order queue that distinguishes between load instructions targeting the program stack and others, using an activity counter to efficiently manage entries and prevent queue overflow by updating or removing entries based on the reorder buffer state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If load instructions targeting the program stack are added to the load order queue, then the queue fills up quickly, but speculative execution is prevented when the queue is full
Solution Approach 1:
The patent segments the load order queue into two separate queues: a first load order queue for load instructions targeting the program stack and a second load order queue for other load instructions. This segmentation prevents stack loads from monopolizing the queue capacity, allowing speculative execution to continue without being blocked by queue full conditions.
Solution Approach 2:
The patent introduces a new dimension to queue management by tracking load instructions at the page level rather than individual instruction level for the first queue. Multiple load instructions targeting the same page are represented by a single entry with an activity counter, effectively adding a pagination dimension that reduces queue occupancy while maintaining execution reliability.
2Quantity of substance
If multiple load instructions targeting the same page are tracked individually, then queue overflow is prevented, but storage efficiency decreases
Solution Approach 1:
The patent merges multiple load instructions targeting the same page into a single queue entry by tracking the page address and maintaining an activity counter. This merging approach consolidates redundant entries, improving storage efficiency while still preventing queue overflow through effective capacity management.
3Device complexity
If a single queue is used for all load instructions, then implementation is simple, but performance degrades due to queue full conditions
Solution Approach 1:
The patent segments the single load order queue into two separate queues based on the target memory region (stack vs. non-stack). This segmentation resolves the performance degradation caused by queue full conditions while maintaining relatively simple implementation through clear differentiation criteria and separate management of each queue.
Data Source
AI summary
Speculative execution using a page-level tracked load order queue includes: determining that a first load instruction targets a determined memory region; and in response to the first load instruction targeting the determined memory region, adding an entry to a page-level tracked load order queue instead of a load order queue, where the entry indicates a page address of a target of the first load instruction.