Page Migration Scheduling Using Device Latency Tolerance

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Solution Overview

Problem

Page migrations in memory systems can cause buffer overflows and performance degradation when not managed with consideration for the latency tolerance of peripheral devices, particularly in virtual machine environments, leading to data loss and operational delays.

Innovation Solution

The solution involves determining the latency tolerance of peripheral devices and using this information to schedule page migrations opportunistically, ensuring sufficient time exists to perform the migration without negatively impacting device operations, thereby avoiding buffer overflows and performance degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If page migration is performed without considering device latency tolerance, then memory access latency is reduced, but buffer overflow occurs and data is lost

Engineering Contradiction:
Improvememory access latencyVSAvoiddata integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system determines the latency tolerance of the first device before initiating page migration. This preliminary assessment allows the system to schedule migration operations at appropriate times when the device can tolerate the pause, preventing buffer overflow while enabling memory optimization. The hypervisor queries device latency tolerance and uses this information to time migration operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts page migration scheduling based on real-time latency tolerance information from peripheral devices. Rather than using a fixed migration schedule, the system adapts migration timing to match device capabilities and current operational state, allowing migration to proceed when tolerance is high and deferring when tolerance is low, thus maintaining both speed improvements and data integrity.

Inventive Principle:
Principle #15Dynamics

2Productivity

If page migration is performed without considering latency tolerance, then memory performance is improved, but device operations are disrupted

Engineering Contradiction:
Improvememory performanceVSAvoiddevice operation continuity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The system implements a feedback mechanism where the hypervisor queries the latency tolerance of peripheral devices before scheduling page migration. This feedback loop ensures that migration operations are coordinated with device operational characteristics, allowing memory performance optimization while maintaining device operation continuity. The device's latency tolerance information guides the timing and scheduling of migration activities.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs preliminary assessment of device latency tolerance before initiating page migration operations. This advance planning allows the system to schedule migrations during periods when device operations can tolerate the pause, ensuring both memory performance improvement and minimal disruption to device operations.

Inventive Principle:
Principle #10Preliminary action

3Speed

If buffer space is not managed with latency tolerance consideration, then data transfer speed is maintained, but buffer overflow causes data loss

Engineering Contradiction:
Improvedata transfer speedVSAvoiddata loss
Core Design Contradiction:
SpeedVSLoss of information

Solution Approach 1:

The system determines device latency tolerance in advance before initiating page migration that would suspend memory access. This preliminary knowledge allows the system to manage buffer space appropriately, ensuring that data transfer can pause safely during migration without causing buffer overflow. The latency tolerance information guides buffer management decisions to prevent data loss while maintaining transfer speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses latency tolerance information to prepare appropriate buffer management strategies before page migration occurs. By knowing the device's tolerance level in advance, the system can allocate sufficient buffer space and timing margins to cushion against potential overflow conditions, ensuring data integrity while maintaining transfer performance.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS12530217B2Scheduling page migrations using latency tolerance
Publication Date: 2026.01.20 MICROSOFT TECHNOLOGY LICENSING LLC
  • US12530217B2 patent drawing
  • US12530217B2 patent drawing
  • US12530217B2 patent drawing

AI summary

Solutions for scheduling page migrations use latency tolerance of coupled devices, such as external peripheral devices (e.g., network adapters), to prevent buffer overflows or other negative performance. A latency tolerance of a device coupled to a virtual object, such as a virtual machine (VM) is determined. This may include the device exposing its latency tolerance using latency tolerance reporting (LTR). When a page migration for the virtual object is pending, a determination is made whether sufficient time exists to perform the page migration, based on at least the latency tolerance of the device. The page migration is performed if sufficient time exists. Otherwise, the page migration is delayed. In some examples, latency tolerances of multiple devices are considered. In some examples, multiple page migrations are performed contemporaneously, based on latency tolerances. Various options are disclosed, such as the page migration being performed by the virtual object software or the device.