Page Table Routing Information for Simpler MMU Address Translation
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Solution Overview
Problem
Current memory access processes in processors are complex due to the need for memory management units (MMUs) to convert virtual addresses (VAs) into physical addresses (PAs) and the involvement of system address decoders (SADs for decoding PAs, increasing the complexity of memory access operations.
Innovation Solution
The proposed solution involves adding routing information to memory page tables, allowing memory management units (MMUs) to directly route physical addresses (PAs) without the need for system address decoders (SADs) by querying the page tables for routing information during address translation, thus simplifying the memory access process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If system address decoders (SADs) are used to decode physical addresses (PAs), then address routing capability is provided, but device complexity increases
Solution Approach 1:
The patent extracts the routing information from the physical address and separates it into a distinct field in the page table entry. The SAD is eliminated entirely, and routing is performed using only the extracted routing information combined with the virtual address, thereby removing the source of complexity while preserving routing capability.
Solution Approach 2:
The page table is enhanced to serve multiple functions: it not only performs address translation but also carries routing information. This multi-functional approach eliminates the need for separate SAD hardware, as the page table structure itself provides both translation and routing capabilities.
2Reliability
If virtual address (VA) to physical address (PA) conversion is performed by MMU, then address translation is achieved, but memory access process complexity increases
Solution Approach 1:
The patent merges the routing information with the page table entry structure, combining address translation and routing functions into a single integrated process. The MMU retrieves both the physical address and routing information from the same page table lookup, eliminating the need for separate SAD decoding steps and simplifying the overall memory access process while maintaining translation accuracy.
Data Source
AI summary
A memory access method comprises adding routing information to a memory page table, so that a memory management unit (MMU) queries, in a process of performing address translation on a virtual address (VA), the memory page table to obtain the routing information. After querying the memory page table and obtaining a physical address (PA), the MMU may directly route the PA based on the routing information, whereby a system address decoder (SAD) is not needed for further decoding the PA.