Paired Scan Chain Ring Oscillator for ACV Monitoring
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Solution Overview
Problem
As integrated circuits shrink, across chip variation (ACV) becomes a concern, leading to reduced performance and increased power requirements due to varying transistor behaviors, and current performance screen ring oscillators (PSROs) occupy significant space and wiring, making them less appealing for monitoring and predicting performance across the chip.
Innovation Solution
A circuit structure and method that pairs scan chain elements from multiple scan chains to form a performance screen ring oscillator (PSRO), where a forward path in one scan chain acts as a backward path in another, allowing for efficient data flow and oscillation in both test and functional modes, thereby reducing space and wiring requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a large number of PSROs are deployed to monitor many areas of the integrated circuit, then monitoring coverage is improved, but space and wiring requirements increase
Solution Approach 1:
The patent merges two separate scan chains into a single PSRO by pairing scan chain elements from each chain. The scan chain link connects corresponding elements from the first and second scan chains, allowing them to function as a unified oscillating structure. This merging approach enables a single PSRO to monitor multiple areas that would traditionally require separate PSROs, thereby reducing the total number of PSROs needed while maintaining comprehensive monitoring coverage.
Solution Approach 2:
The paired scan chain elements serve multiple functions simultaneously. Each scan chain element in the pairing acts as both a scan chain element for testing and as part of the PSRO oscillation structure for performance monitoring. The scan chain link enables the same physical structure to fulfill both scan testing and PSRO monitoring functions, reducing the need for separate dedicated structures and minimizing space and wiring requirements.
2Reliability
If margins are provided to ensure integrated circuit operation under ACV, then reliability is improved, but performance is reduced and power requirements increase
Solution Approach 1:
The PSRO provides feedback about the performance of the monitored area of the integrated circuit. By monitoring parameters such as oscillation frequency, duty cycle, or other signal characteristics, the PSRO generates information about the actual performance under ACV conditions. This feedback enables the design to understand real-world performance variations without requiring excessive margins, allowing for optimized performance and reduced power consumption while maintaining reliability.
Data Source
AI summary
A performance screen ring oscillator (PSRO) formed from paired scan chains is disclosed. A circuit structure comprises scan chains each having scan chain elements. A scan chain link is configured to pair at least one scan chain element from a first scan chain with at least one scan chain element of a second scan chain to form a PSRO. A forward path associated with data flow through the at least one scan chain element of the first scan chain becomes a backward path of the at least one scan chain element of the second scan chain, and a forward path associated with data flow through the at least one scan chain element of the second scan chain becomes a backward path of the at least one scan chain element of the first scan chain.