Paired Test Pad Design for Reducing Contact Resistance
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Solution Overview
Problem
Contact resistances between probe pins and test pads in semiconductor wafers lead to inaccuracies in evaluating the performance of integrated circuit devices, as they cause voltage and current shifts, making it difficult to maintain yield and throughput in high-speed semiconductor manufacturing.
Innovation Solution
The implementation of a novel test pad design where test pads are grouped in pairs, with each pair consisting of a forcing pad and a sensing pad, interconnected through a common node with minimal parasitic passive devices, and a probe card with pairs of probe pins that match the arrangement of test pads to reduce contact resistance effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional single test pad design is used, then the testing process is simple, but contact resistance causes voltage and current shifts leading to measurement inaccuracy
Solution Approach 1:
The test pad is segmented into two separate pads: a forcing pad for applying voltage and a sensing pad for measuring current. This segmentation allows the forcing and sensing operations to be performed at different locations, reducing the impact of contact resistance on measurement accuracy while maintaining a relatively simple overall test structure.
2Reliability
If test pads are interconnected with minimal parasitic devices, then contact resistance effects are reduced, but the test line complexity increases
Solution Approach 1:
The harmful effect of contact resistance is extracted and isolated by separating the forcing and sensing paths. The forcing path includes the forcing pad and its contact resistance, while the sensing path includes the sensing pad and its contact resistance. By taking out the sensing operation from the forcing path, the measurement becomes independent of the forcing contact resistance, improving reliability.
3Manufacturing precision
If paired test pad design is implemented, then voltage and current shifts are minimized, but the manufacturing process becomes more complex
Solution Approach 1:
The forcing pad and sensing pad are merged into a single test line structure, sharing common interconnection paths and support infrastructure. While the pads themselves are separate, their integration into the test line uses similar fabrication processes and materials, reducing the overall manufacturing complexity compared to completely separate test structures.
Data Source
AI summary
An integrated circuit structure includes a semiconductor wafer; integrated circuit devices in the semiconductor wafer; and a plurality of test pads on a top surface of the semiconductor wafer and connected to the integrated circuit devices. Test pads are grouped in pairs, with the test pads in a same pair are interconnected.


