PAM Ethernet FEC Allocation With Unequal Coding Gains
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Solution Overview
Problem
High-speed Ethernet interfaces face challenges in reducing physical-layer resource occupation and implementation complexity due to the need for high-gain forward error correction (FEC) mechanisms to correct bit errors, especially at high data transmission rates beyond 100 gigabit/s.
Innovation Solution
A data processing method and apparatus for Ethernet interfaces that utilize FEC encoders with varying coding gains to distribute bit streams across multiple channels in a round-robin fashion, using pulse amplitude modulation (PAM) and alignment markers to optimize error correction based on bit error rates, thereby reducing resource usage and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-gain FEC mechanism is used to correct errors during long-distance transmission, then error correction capability is improved, but physical-layer resources are increased
Solution Approach 1:
The patent applies local quality by using different coding gains for different channels based on their specific bit error rates. Instead of uniformly applying high-gain FEC to all channels, the system selectively assigns coding gains (e.g., 3dB, 6dB, or 9dB) to each channel according to its error characteristics, thereby optimizing error correction where needed while conserving physical-layer resources in channels with better performance.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the coding gain parameter of FEC encoders based on measured bit error rates. The system monitors channel quality and modifies the coding gain parameter accordingly, allowing the FEC mechanism to adapt between high-gain and low-gain modes, thus balancing error correction capability with resource consumption.
2Reliability
If a high-gain FEC mechanism is used to correct errors during long-distance transmission, then error correction capability is improved, but implementation complexity is increased
Solution Approach 1:
The patent reduces implementation complexity by applying high-gain FEC only to channels that require it, rather than uniformly implementing complex high-gain FEC across all channels. By identifying which channels need error correction and applying appropriate coding gains only to those channels, the system lowers the overall implementation complexity while maintaining necessary error correction capability.
Solution Approach 2:
The patent applies partial action by using high-gain FEC only partially - specifically on channels with high bit error rates - rather than applying it excessively to all channels. This selective approach reduces the overall complexity burden while still achieving the required error correction for problematic channels.
3Productivity
If multiple channels are used to exceed 100 gigabit/s bandwidth, then transmission capacity is improved, but bit error rate increases
Solution Approach 1:
The patent addresses the increased bit error rate in multi-channel systems by applying different coding gains to different channels based on their individual error characteristics. This localized approach allows the system to maintain high transmission capacity across multiple channels while providing enhanced error correction specifically to channels experiencing higher error rates.
Data Source
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AI summary
Embodiments of this application disclose a data processing method and apparatus. The method includes: distributing, by a first distribution circuit, a first bit stream to FEC encoders 1 to N in a round robin fashion, where digital signals 1 to N that are output after being encoded by the FEC encoders 1 to N are in a one-to-one correspondence with a least significant bit to a most significant bit of an input signal of a PAM circuit, a coding gain GX of an FEC encoder X is greater than a coding gain GY of an FEC encoder Y, 1≤X<Y≤N, N≥2, and X, Y, and N are all integers. In the method provided in the embodiments of this application, different FEC coding gains can be provided for links with different bit error rates, so that a requirement of a high-rate Ethernet for a high gain during long-distance data transmission is met, and physical-layer resources occupied by FEC are reduced.