PAM-3 Encoder and Decoder for DRAM Bandwidth Scaling

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Solution Overview

Problem

Current DRAM technologies are limited by single-ended PAM-2 signaling, with PAM-4 signaling experiencing eye-closure and noise susceptibility due to lower signal-to-noise ratio, which hampers bandwidth scaling and increases complexity and costs.

Innovation Solution

Implementing PAM-3 signaling with 11b7s and 3b2s encoding techniques to enhance data density and reduce IO training complexity, utilizing 12-pin interfaces to transmit two PAM-3 symbols per three bits, and encoding CRC, poison, and severity bits to maintain error detection and correction efficacy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If PAM-4 signaling is used to boost DRAM bandwidth, then bandwidth increases, but eye-closure and noise susceptibility increase due to lower signal-to-noise ratio

Engineering Contradiction:
ImproveDRAM bandwidthVSAvoidsignal-to-noise ratio
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the modulation parameter from PAM-4 to PAM-3, which provides a middle ground between PAM-2 and PAM-4. This parameter change achieves higher bandwidth than PAM-2 while maintaining better signal-to-noise ratio and eye margin than PAM-4, effectively resolving the contradiction between bandwidth and reliability.

Inventive Principle:
Principle #35Parameter changes

2Speed

If PAM-4 signaling is used to increase interface rate, then interface rate increases, but complexity and costs increase

Engineering Contradiction:
Improveinterface rateVSAvoidIO training complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent changes the signaling parameter from PAM-4 to PAM-3, which simplifies the encoder and decoder hardware complexity while maintaining high interface rates. The PAM-3 encoding scheme requires less complex circuitry compared to PAM-4, reducing manufacturing costs and training complexity while achieving comparable or superior performance.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If PAM-2 signaling is used, then hardware complexity is low, but bandwidth is limited

Engineering Contradiction:
Improveencoder complexityVSAvoidbandwidth
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent changes the modulation parameter from PAM-2 to PAM-3, which increases the data density from 1 bit per symbol to 1.5 bits per symbol. This parameter change doubles the bandwidth capability compared to PAM-2 while maintaining relatively simple hardware implementation, effectively resolving the contradiction between low complexity and limited bandwidth.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12197281B2Hardware-efficient PAM-3 encoder and decoder
Publication Date: 2025.01.14 NVIDIA CORP
  • US12197281B2 patent drawing
  • US12197281B2 patent drawing
  • US12197281B2 patent drawing

AI summary

A transceiver configured to communicate a burst of data bits and meta-data bits for the data bits includes data channels, auxiliary data channels, and at least one error correction channel. The transceiver includes an encoder that applies 11b7s encoding to a first number of the data bits to generate first PAM-3 symbols on some or all of the communication channels, and that applies 3b2s encoding to a second number of the data bits to generate second PAM-3 symbols on at least some of the communication channels.