PAM-4 Receiver Circuit Using Two Comparators for Low Power
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Solution Overview
Problem
Existing PAM-4 signal receivers face high power consumption due to the use of multiple comparators and a decoder, which is a challenge for mobile devices with limited battery power.
Innovation Solution
A PAM-4 signal receiving device is designed with only two comparators, eliminating the need for a decoder, by using a first comparator for the MSB and a second comparator to determine the LSB without additional decoding, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If three comparators and a decoder are used to recognize thermometer code and convert to binary code, then the PAM-4 signal can be accurately received, but the power consumption becomes large
Solution Approach 1:
The patent extracts and eliminates the decoder component from the traditional PAM-4 receiver architecture. By using two comparators with specifically designed threshold voltages (VTH1 and VTH2) that directly generate binary output signals, the decoder function is rendered unnecessary, thereby reducing power consumption while maintaining signal recognition accuracy
Solution Approach 2:
The patent changes the operating parameters of the comparators by setting specific threshold voltages (VTH1 and VTH2) that correspond to the decision boundaries of the PAM-4 signal levels. This parameter optimization allows the comparators to directly produce correct binary outputs without requiring additional decoding logic, thus reducing power consumption
2Measurement precision
If three comparators are used to identify two bits in a high-speed operation circuit, then the PAM-4 signal can be accurately decoded, but the device complexity increases
Solution Approach 1:
The patent removes one comparator from the traditional three-comparator architecture by extracting the decoding function and integrating it into the comparator logic itself. The two remaining comparators with optimized threshold voltages directly generate binary outputs, eliminating the need for the third comparator and subsequent decoding circuitry
Solution Approach 2:
The patent merges the functions of multiple comparators and the decoder into a simplified two-comparator structure. By combining the threshold comparison and binary decision-making functions into the comparator circuits themselves, the overall device complexity is reduced while maintaining accurate bit identification
Data Source
AI summary
Proposed is a device for receiving a four-level pulse amplitude modulation (PAM-4) signal, which includes a first comparator for comparing a received PAM-4 signal with a predetermined threshold voltage to output a most significant bit (MSB) signal; and a second comparator for comparing the differential signal difference between the positive signal and negative signal of the received PAM-4 signal with a reference voltage to output a least significant bit (LSB) signal.