PAM4 Reference Voltage Generation Circuit for Power Noise Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The PAM4 signaling scheme used in next-generation memory systems is vulnerable to power noise due to its relatively small voltage margin, which can lead to decoding errors.
Innovation Solution
A reference voltage generation device that includes a noise information generation circuit to generate power noise information based on first and second power noises propagated through a communication line, and a reference voltage generation circuit that uses this information to generate three or more reference voltages for the multi-level signaling scheme.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If PAM4 signaling scheme is used to double throughput, then productivity is improved, but reliability deteriorates due to small voltage margin and vulnerability to power noise
Solution Approach 1:
The patent applies preliminary action by generating reference voltages that pre-compensate for power noise before the actual data transmission occurs. The noise information generation circuit captures power noise characteristics during a training phase, and the reference voltage generation circuit uses this information to create adjusted reference voltages that account for anticipated noise conditions during normal operation. This proactive approach allows the system to maintain reliable decoding accuracy while using the high-throughput PAM4 signaling scheme.
2Productivity
If PAM4 signaling scheme is used to increase bandwidth efficiency, then productivity is improved, but object-affected harmful factors worsen due to increased vulnerability to power noise
Solution Approach 1:
The patent converts the harmful effect of power noise into a beneficial factor by using the noise information generation circuit to capture and characterize power noise characteristics. Instead of treating power noise purely as interference to be eliminated, the system uses this noise information to adjust and optimize the reference voltages, thereby transforming the previously harmful power noise into a parameter that can be compensated for and even utilized to improve decoding accuracy under noisy conditions.
3Reliability
If reference voltages are adjusted to compensate for power noise, then reliability is improved, but device complexity increases due to additional noise information generation circuit
Solution Approach 1:
The patent applies merging by integrating the noise information generation circuit and reference voltage generation circuit into the existing memory interface architecture. Rather than adding completely separate compensation systems, the invention combines these functions with the existing PAM4 signaling infrastructure, sharing common components such as power supply lines, communication channels for noise information transfer, and integration points within the memory controller and memory device. This merging approach minimizes the increase in device complexity while achieving reliable power noise compensation.
Data Source
AI summary
A reference voltage generation device includes a noise information generation circuit configured to generate power noise information based on a first power noise and a second power noise, the first power noise and the second power noise generated based on a first power and a second power supplied to a first electronic device and propagated from the first electronic device to a second electronic device through a communication line, and the first electronic device and the second electronic device configured to perform data communication using a multi-level signaling scheme. The device includes a reference voltage generation circuit configured to generate three or more reference voltages for the multi-level signaling scheme based on the power noise information, and the second electronic device is configured to use the three or more reference voltages.


