PAM4 Transceiver Sampling Chain With Integrated Equalizer Amplifier

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Solution Overview

Problem

Existing data communication systems face challenges in efficiently processing high-speed data transfer demands due to limitations in spectral efficiency and power consumption, particularly in handling multimedia files and high-bandwidth applications like social networks, where current systems are inadequate for high-speed data communication applications.

Innovation Solution

A transceiver system that includes a voltage gain amplifier for equalization, track and hold circuits, shift and hold buffer units, ADC modules for analog-to-digital conversion, and DSP functions for error correction and data processing, which eliminates the need for separate equalization modules and reference clock signals, reducing power consumption and noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If separate equalization modules and reference clock signals are used in existing transceiver systems, then signal processing functions can be performed, but power consumption increases and noise is introduced

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal processing capability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent combines the equalization function with the voltage gain amplifier by configuring the amplifier to perform both voltage amplification and equalization of the received signal. This integration eliminates the need for a separate equalization module, thereby reducing power consumption while maintaining signal processing capability. The merged amplifier processes signals at multiple voltage levels (first, second, and third voltage levels) to achieve both gain and equalization in a single component.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If multiple separate modules are used for signal processing, then comprehensive signal processing functions are achieved, but device complexity increases

Engineering Contradiction:
Improvesignal processing completenessVSAvoidnumber of separate modules
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The voltage gain amplifier is designed to perform multiple functions simultaneously: it amplifies the received signal, equalizes the signal across different frequency components, and generates drive signals for track-and-hold circuits. This multi-functional design reduces the number of separate modules needed in the transceiver system while maintaining comprehensive signal processing capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If high-speed data communication is implemented to meet bandwidth demands, then data throughput increases, but power consumption and noise increase

Engineering Contradiction:
Improvedata throughputVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The transceiver system uses periodic sampling of the received signal at specific voltage levels (first, second, and third voltage levels) synchronized with the signal waveform. This periodic sampling approach enables high-speed data communication by capturing signal information at optimal moments, while the integrated amplifier reduces power consumption compared to continuous processing in separate modules.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9847839B2PAM4 transceivers for high-speed communication
Publication Date: 2017.12.19 MARVELL ASIA PTE LTD
  • US9847839B2 patent drawing
  • US9847839B2 patent drawing
  • US9847839B2 patent drawing

AI summary

The present invention is directed to data communication. More specifically, embodiments of the present invention provide a transceiver that processes an incoming data stream and generates a recovered clock signal based on the incoming data stream. The transceiver includes a voltage gain amplifier that also performs equalization and provides a driving signal to track and hold circuits that hold the incoming data stream, which is stored by shift and holder buffer circuits. Analog to digital conversion is then performed on the buffer data by a plurality of ADC circuits. Various DSP functions are then performed over the converted data. The converted data are then encoded and transmitted in a PAM format. There are other embodiments as well.