Panel-Level Chip Device Redistribution Layer Merging

Solution Overview

Problem

Highly integrated and small-sized packaged chips face challenges in assembly on printed circuit boards due to heavy workload, reliability issues, and high failure rates, along with high production costs and power consumption, especially in complex wiring scenarios that require large printed circuit boards.

Innovation Solution

A panel-level chip device and packaging method involving a supporting base with bare chips, connection pillars, encapsulation layers, and redistribution layers that reduce the number of solder balls and simplify assembly by electrically connecting pillars through redistribution elements, leading to improved integration, reduced power consumption, and miniaturization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the integration degree of a single packaged chip is increased to achieve miniaturization, then the chip size is reduced, but the assembly workload increases and reliability decreases due to the need for welding operations on each placement ball

Engineering Contradiction:

Improvechip sizeVSAvoidconnection reliability

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

The patent merges multiple connection pillars into a single solder ball through the redistribution layer. Multiple connection pillars that would otherwise require individual welding operations are electrically connected and combined into one solder ball, reducing assembly workload while maintaining electrical connectivity and improving reliability.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The redistribution layer serves multiple functions: it electrically connects multiple connection pillars, combines them into a single solder ball interface, and provides a standardized connection interface to the printed circuit board. This multi-functional approach simplifies the assembly process while ensuring reliable connections.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Volume of moving object

If the integration degree of a single packaged chip is increased to achieve miniaturization, then the chip size is reduced, but the assembly complexity and failure rate increase due to heavy workload on placement balls

Engineering Contradiction:

Improvechip sizeVSAvoidassembly complexity

Core Design Contradiction:

Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent merges multiple connection pillars into a single solder ball through the redistribution layer. Multiple connection pillars that would otherwise require individual welding operations are electrically connected and combined into one solder ball, reducing assembly workload while maintaining electrical connectivity and improving reliability.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The redistribution layer acts as an intermediary between the multiple connection pillars and the single solder ball interface. It provides the necessary electrical connections and mechanical support, simplifying the assembly process by reducing the number of individual welding operations required.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Area of stationary object

If the printed circuit board size is increased to accommodate complicated wiring, then wiring interference is prevented, but the power consumption increases and miniaturization goals are compromised

Engineering Contradiction:

Improveprinted circuit board areaVSAvoidpower consumption

Core Design Contradiction:

Area of stationary objectVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple connection pillars into a single solder ball through the redistribution layer. Multiple connection pillars that would otherwise require individual welding operations are electrically connected and combined into one solder ball, reducing assembly workload while maintaining electrical connectivity and improving reliability.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The redistribution layer redistributes electrical connections in a different spatial arrangement, allowing multiple connection pillars to be electrically connected through a single solder ball interface. This dimensional reorganization reduces the complexity of wiring on the printed circuit board and enables miniaturization while maintaining electrical connectivity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11646272B2Packaging method of panel-level chip device

Publication Date: 2023.05.09 SHANGHAI AVIC OPTO ELECTRONICS CO LTD

AI summary

Packaging method for forming the panel-level chip device is provided. The panel-level chip device includes a plurality of first bare chips disposed on a supporting base, and a plurality of first connection pillars. The panel-level chip device also includes a first encapsulation layer, and a first redistribution layer. The first redistribution layer includes a plurality of first redistribution elements and a plurality of second redistribution elements. Further, the panel-level chip device includes a solder ball group including a plurality of first solder balls. First connection pillars having a same electrical signal are electrically connected to each other by a first redistribution element. Each of remaining first connection pillars is electrically connected to one second redistribution element. The one second redistribution element is further electrically connected to a first solder ball of the plurality of first solder balls.